2008 |
55 | EE | Eric L. Hill,
Mikko H. Lipasti,
Kewal K. Saluja:
An accurate flip-flop selection technique for reducing logic SER.
DSN 2008: 128-136 |
54 | EE | Nidhi Aggarwal,
Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
Power-Efficient DRAM Speculation.
HPCA 2008: 317-328 |
53 | EE | Natalie D. Enright Jerger,
Li-Shiuan Peh,
Mikko H. Lipasti:
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support.
ISCA 2008: 229-240 |
52 | EE | Natalie D. Enright Jerger,
Li-Shiuan Peh,
Mikko H. Lipasti:
Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence.
MICRO 2008: 35-46 |
51 | EE | Natalie D. Enright Jerger,
Li-Shiuan Peh,
Mikko H. Lipasti:
Circuit-Switched Coherence.
NOCS 2008: 193-202 |
50 | EE | Gordon B. Bell,
Mikko H. Lipasti:
Skewed redundancy.
PACT 2008: 62-71 |
2007 |
49 | EE | Erika Gunadi,
Mikko H. Lipasti:
A position-insensitive finished store buffer.
ICCD 2007: 105-112 |
48 | EE | Eric L. Hill,
Mikko H. Lipasti:
Transparent mode flip-flops for collapsible pipelines.
ICCD 2007: 553-560 |
47 | EE | Erika Gunadi,
Mikko H. Lipasti:
Power-aware operand delivery.
ISLPED 2007: 375-378 |
46 | EE | Lixin Su,
Mikko H. Lipasti:
Speculative optimization using hardware-monitored guarded regions for java virtual machines.
VEE 2007: 22-32 |
45 | EE | Natalie D. Enright Jerger,
Mikko H. Lipasti,
Li-Shiuan Peh:
Circuit-Switched Coherence.
Computer Architecture Letters 6(1): 5-8 (2007) |
2006 |
44 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
Stealth prefetching.
ASPLOS 2006: 274-282 |
43 | EE | Lixin Su,
Mikko H. Lipasti:
Dynamic Class Hierarchy Mutation.
CGO 2006: 98-110 |
42 | EE | Shiliang Hu,
Ilhyun Kim,
Mikko H. Lipasti,
James E. Smith:
An approach for implementing efficient superscalar CISC processors.
HPCA 2006: 41-52 |
41 | EE | Eric L. Hill,
Mikko H. Lipasti:
Stall cycle redistribution in a transparent fetch pipeline.
ISLPED 2006: 31-36 |
40 | EE | Natalie D. Enright Jerger,
Eric L. Hill,
Mikko H. Lipasti:
Friendly fire: understanding the effects of multiprocessor prefetches.
ISPASS 2006: 177-188 |
39 | EE | Jason F. Cantin,
James E. Smith,
Mikko H. Lipasti,
Andreas Moshovos,
Babak Falsafi:
Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays.
IEEE Micro 26(1): 70-79 (2006) |
38 | EE | Eric F. Weglarz,
Kewal K. Saluja,
Mikko H. Lipasti:
Energy Estimation of the Memory Subsystem in Multiprocessor Systems.
J. Low Power Electronics 2(3): 325-332 (2006) |
2005 |
37 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking.
ISCA 2005: 246-257 |
36 | EE | Kevin M. Lepak,
Mikko H. Lipasti:
Reaping the Benefit of Temporal Silence to Improve Communication Performance.
ISPASS 2005: 258-268 |
35 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
The Complexity of Verifying Memory Coherence and Consistency.
IEEE Trans. Parallel Distrib. Syst. 16(7): 663-671 (2005) |
2004 |
34 | EE | Ilhyun Kim,
Mikko H. Lipasti:
Understanding Scheduling Replay Schemes.
HPCA 2004: 198-209 |
33 | EE | Mikko H. Lipasti,
Brian R. Mestan,
Erika Gunadi:
Physical Register Inlining.
ISCA 2004: 325-337 |
32 | EE | Harold W. Cain,
Mikko H. Lipasti:
Memory Ordering: A Value-Based Approach.
ISCA 2004: 90-101 |
31 | EE | Gordon B. Bell,
Mikko H. Lipasti:
Deconstructing commit.
ISPASS 2004: 68-77 |
30 | EE | Harold W. Cain,
Mikko H. Lipasti:
Memory Ordering: A Value-Based Approach.
IEEE Micro 24(6): 110-117 (2004) |
29 | EE | Harold W. Cain,
Mikko H. Lipasti,
Ravi Nair:
Constraint Graph Analysis of Multithreaded Programs.
J. Instruction-Level Parallelism 6: (2004) |
2003 |
28 | EE | Brian R. Mestan,
Mikko H. Lipasti:
Exploiting Partial Operand Knowledge.
ICPP 2003: 369-378 |
27 | EE | Kevin M. Lepak,
Harold W. Cain,
Mikko H. Lipasti:
Redeeming IPC as a Performance Metric for Multithreaded Programs.
IEEE PACT 2003: 232-243 |
26 | EE | Harold W. Cain,
Mikko H. Lipasti,
Ravi Nair:
Constraint Graph Analysis of Multithreaded Programs.
IEEE PACT 2003: 4-14 |
25 | EE | Ilhyun Kim,
Mikko H. Lipasti:
Half-Price Architecture.
ISCA 2003: 28-38 |
24 | EE | Ilhyun Kim,
Mikko H. Lipasti:
Macro-op Scheduling: Relaxing Scheduling Loop Constraints.
MICRO 2003: 277-290 |
23 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
The complexity of verifying memory coherence.
SPAA 2003: 254-255 |
2002 |
22 | EE | Kevin M. Lepak,
Mikko H. Lipasti:
Temporally silent stores.
ASPLOS 2002: 30-41 |
21 | EE | Jarrod A. Lewis,
Mikko H. Lipasti,
Bryan Black:
Avoiding Initialization Misses to the Heap.
ISCA 2002: 183-194 |
20 | EE | Ilhyun Kim,
Mikko H. Lipasti:
Implementing Optimizations at Decode Time.
ISCA 2002: 221-232 |
19 | EE | Harold W. Cain,
Mikko H. Lipasti:
Verifying sequential consistency using vector clocks.
SPAA 2002: 153-154 |
18 | EE | Eric F. Weglarz,
Kewal K. Saluja,
Mikko H. Lipasti:
Minimizing Energy Consumption for High-Performance Processing.
VLSI Design 2002: 199- |
2001 |
17 | EE | Harold W. Cain,
Ravi Rajwar,
Morris Marden,
Mikko H. Lipasti:
An Architectural Evaluation of Java TPC-W.
HPCA 2001: 229-240 |
16 | EE | Milo M. K. Martin,
Daniel J. Sorin,
Harold W. Cain,
Mark D. Hill,
Mikko H. Lipasti:
Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing.
MICRO 2001: 328-337 |
15 | EE | Kevin M. Lepak,
Gordon B. Bell,
Mikko H. Lipasti:
Silent Stores and Store Value Locality.
IEEE Trans. Computers 50(11): 1174-1190 (2001) |
14 | EE | Harold W. Cain,
Kevin M. Lepak,
Mikko H. Lipasti:
A dynamic binary translation approach to architectural simulation.
SIGARCH Computer Architecture News 29(1): 27-36 (2001) |
2000 |
13 | EE | Gordon B. Bell,
Kevin M. Lepak,
Mikko H. Lipasti:
Characterization of Silent Stores.
IEEE PACT 2000: 133-144 |
12 | EE | Kevin M. Lepak,
Mikko H. Lipasti:
On the value locality of store instructions.
ISCA 2000: 182-191 |
11 | EE | Kevin M. Lepak,
Mikko H. Lipasti:
Silent stores for free.
MICRO 2000: 22-31 |
10 | EE | Steven R. Kunkel,
Richard J. Eickemeyer,
Mikko H. Lipasti,
Timothy J. Mullins,
Brian O'Krafka,
Harold Rosenberg,
Steven P. Vanderwiel,
Philip L. Vitale,
Larry D. Whitley:
A performance methodology for commercial servers.
IBM Journal of Research and Development 44(6): 851-872 (2000) |
1999 |
9 | EE | Derek L. Howard,
Mikko H. Lipasti:
The Effect of Program Optimization on Trace Cache Efficiency.
IEEE PACT 1999: 256-261 |
1998 |
8 | | Mikko H. Lipasti,
John Paul Shen:
Exploiting Value Locality to Exceed the Dataflow Limit.
International Journal of Parallel Programming 26(4): 505-538 (1998) |
1997 |
7 | | Mikko H. Lipasti,
John Paul Shen:
The Performance Potential of Value and Dependence Prediction.
Euro-Par 1997: 1043-1052 |
6 | | Mikko H. Lipasti,
John Paul Shen:
Superspeculative Microarchitecture for Beyond AD 2000.
IEEE Computer 30(9): 59-66 (1997) |
1996 |
5 | | Mikko H. Lipasti,
Christopher B. Wilkerson,
John Paul Shen:
Value Locality and Load Value Prediction.
ASPLOS 1996: 138-147 |
4 | EE | Bryan Black,
Andrew S. Huang,
Mikko H. Lipasti,
John Paul Shen:
Can Trace-Driven Simulators Accurately Predict Superscalar Performance?
ICCD 1996: 478-485 |
3 | EE | Mikko H. Lipasti,
John Paul Shen:
Exceeding the Dataflow Limit via Value Prediction.
MICRO 1996: 226-237 |
1995 |
2 | EE | Mikko H. Lipasti,
William J. Schmidt,
Steven R. Kunkel,
Robert R. Roediger:
SPAID: software prefetching in pointer- and call-intensive environments.
MICRO 1995: 231-236 |
1993 |
1 | | Trung A. Diep,
Mikko H. Lipasti,
John Paul Shen:
Architecture-Compatible Code Boosting for Performance Enhancement of the IBM RS/6000.
ICCD 1993: 86-93 |