| |
| 2000 | ||
|---|---|---|
| 6 | EE | Janardhan H. Satyanarayana, Keshab K. Parhi: Power Estimation of Digital Data Paths Using HEAT. IEEE Design & Test of Computers 17(2): 101-110 (2000) |
| 5 | EE | Janardhan H. Satyanarayana, Keshab K. Parhi: Theoretical analysis of word-level switching activity in the presence of glitching and correlation. IEEE Trans. VLSI Syst. 8(2): 148-159 (2000) |
| 1999 | ||
| 4 | EE | Janardhan H. Satyanarayana, Keshab K. Parhi: Theoretical Analysis of Word-Level Switching Activity in the Presence of Glitching and Correlation. Great Lakes Symposium on VLSI 1999: 46-49 |
| 1997 | ||
| 3 | Yun-Nan Chang, Janardhan H. Satyanarayana, Keshab K. Parhi: Design and Implementation of Low-Power Digit-Serial Multipliers. ICCD 1997: 186-195 | |
| 1996 | ||
| 2 | EE | Janardhan H. Satyanarayana, Keshab K. Parhi: HEAT: Hierarchical Energy Analysis Tool. DAC 1996: 9-14 |
| 1 | EE | Janardhan H. Satyanarayana, Keshab K. Parhi, Leilei Song, Yun-Nan Chang: Systematic analysis of bounds on power consumption in pipelined and non-pipelined multipliers. ICCD 1996: 492-499 |
| 1 | Yun-Nan Chang | [1] [3] |
| 2 | Keshab K. Parhi | [1] [2] [3] [4] [5] [6] |
| 3 | Leilei Song | [1] |