2003 |
27 | EE | Maurizio Damiani,
Andrei Y. Selchenko:
Boolean Technology Mapping Based on Logic Decomposition.
SBCCI 2003: 35-40 |
2000 |
26 | EE | Alessandro Bogliolo,
Michele Favalli,
Maurizio Damiani:
Enabling testability of fault-tolerant circuits by means of IDDQ-checkable voters.
IEEE Trans. VLSI Syst. 8(4): 415-419 (2000) |
1999 |
25 | EE | Valeria Bertacco,
Maurizio Damiani,
Stefano Quer:
Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits.
DAC 1999: 391-396 |
1997 |
24 | EE | Valeria Bertacco,
Maurizio Damiani:
The disjunctive decomposition of logic functions.
ICCAD 1997: 78-82 |
23 | EE | Maurizio Damiani:
The state reduction of nondeterministic finite-state machines.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(11): 1278-1291 (1997) |
1996 |
22 | | Fulvio Corno,
Paolo Prinetto,
Maurizio Rebaudengo,
Matteo Sonza Reorda,
Maurizio Damiani,
Leonardo Impagliazzo,
G. Sartore:
On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications.
EDCC 1996: 190-202 |
21 | EE | Valeria Bertacco,
Maurizio Damiani:
Boolean Function Representation Using Parallel-Access Diagrams.
Great Lakes Symposium on VLSI 1996: 112-117 |
20 | EE | Valeria Bertacco,
Maurizio Damiani:
Boolean Function Representation Based on Disjoint-Support Decompositions.
ICCD 1996: 27- |
19 | | Vishwani D. Agrawal,
Ronald D. Blanton,
Maurizio Damiani:
Synthesis of Self-Testing Finite State Machines from High-Level Specifications.
ITC 1996: 757-766 |
18 | EE | Jerry Chih-Yuan Yang,
Giovanni De Micheli,
Maurizio Damiani:
Scheduling and control generation with environmental constraints based on automata representations.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(2): 166-183 (1996) |
1995 |
17 | EE | Alessandro Bogliolo,
Maurizio Damiani,
Piero Olivo,
Bruno Riccò:
Reliability evaluation of combinational logic circuits by symbolic simulation.
VTS 1995: 235-243 |
16 | EE | Alessandro Bogliolo,
Maurizio Damiani:
Synthesis of combinational circuits with special fault-handling capabilitie.
VTS 1995: 454-459 |
15 | EE | Maurizio Damiani,
Jerry Chih-Yuan Yang,
Giovanni De Micheli:
Optimization of combinational logic circuits based on compatible gates.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(11): 1316-1327 (1995) |
1994 |
14 | | Maurizio Damiani:
Nondeterministic finite-state machines and sequential don't cares.
EDAC-ETC-EUROASIC 1994: 192-198 |
13 | | Jerry Chih-Yuan Yang,
Giovanni De Micheli,
Maurizio Damiani:
Scheduling with Environmental Constraints based on Automata Representations.
EDAC-ETC-EUROASIC 1994: 495-501 |
12 | | Jérôme Fron,
Jerry Chih-Yuan Yang,
Maurizio Damiani,
Giovanni De Micheli:
A Synthesis Framework Based on Trace and Automata Theory.
ISCAS 1994: 291-294 |
1993 |
11 | EE | Maurizio Damiani,
Jerry Chih-Yuan Yang,
Giovanni De Micheli:
Optimization of Combinational Logic Circuits Based on Compatible Gates.
DAC 1993: 631-636 |
10 | EE | Maurizio Damiani,
Giovanni De Micheli:
Don't care set specifications in combinational and synchronous logic circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(3): 365-388 (1993) |
1992 |
9 | EE | Maurizio Damiani,
Giovanni De Micheli:
Recurrence Equations and the Optimization of Synchronous Logic Circuits.
DAC 1992: 556-561 |
8 | EE | Silvia Ercolani,
Michele Favalli,
Maurizio Damiani,
Piero Olivo,
Bruno Riccò:
Testability measures in pseudorandom testing.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(6): 794-800 (1992) |
1991 |
7 | | Maurizio Damiani,
Piero Olivo,
Bruno Riccò:
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing.
IEEE Trans. Computers 40(9): 1034-1045 (1991) |
6 | EE | Michele Favalli,
Piero Olivo,
Maurizio Damiani,
Bruno Riccò:
Fault simulation of unconventional faults in CMOS circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 677-682 (1991) |
1990 |
5 | | Maurizio Damiani,
Giovanni De Micheli:
Observability Don't Care Sets and Boolean Relations.
ICCAD 1990: 502-505 |
4 | EE | Maurizio Damiani,
Piero Olivo,
Michele Favalli,
Silvia Ercolani,
Bruno Riccò:
Aliasing in signature analysis testing with multiple input shift registers.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(12): 1344-1353 (1990) |
1989 |
3 | | Michele Favalli,
Piero Olivo,
Maurizio Damiani,
Bruno Riccò:
CMOS Design for Improved IC Testability.
ITC 1989: 934 |
2 | | Piero Olivo,
Maurizio Damiani,
Bruno Riccò:
On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing.
ITC 1989: 936 |
1 | EE | Maurizio Damiani,
Piero Olivo,
Michele Favalli,
Bruno Riccò:
An analytical model for the aliasing probability in signature analysis testing.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(11): 1133-1144 (1989) |