2006 |
20 | EE | Pierre G. Paulin,
Chuck Pilkington,
Michel Langevin,
Essaid Bensoudane,
Olivier Benny,
Damien Lyonnard,
Bruno Lavigueur,
David Lo:
Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems.
DATE 2006: 482-487 |
19 | EE | Pierre G. Paulin,
Chuck Pilkington,
Michel Langevin,
Essaid Bensoudane,
Damien Lyonnard,
Olivier Benny,
Bruno Lavigueur,
David Lo,
Giovanni Beltrame,
V. Gagne,
Gabriela Nicolescu:
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia.
IEEE Trans. VLSI Syst. 14(7): 667-680 (2006) |
2004 |
18 | EE | Pierre G. Paulin,
Chuck Pilkington,
Michel Langevin,
Essaid Bensoudane,
Gabriela Nicolescu:
Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management.
CODES+ISSS 2004: 48-53 |
17 | EE | Pierre G. Paulin,
Chuck Pilkington,
Essaid Bensoudane,
Michel Langevin,
Damien Lyonnard:
Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding.
DATE 2004: 58-63 |
1999 |
16 | EE | Sofiène Tahar,
Xiaoyu Song,
Eduard Cerny,
Zijian Zhou,
Michel Langevin,
Otmane Aït Mohamed:
Modeling and formal verification of the Fairisle ATM switch fabricusing MDGs.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 956-972 (1999) |
1997 |
15 | | Eduard Cerny,
Francisco Corella,
Michel Langevin,
Xiaoyu Song,
Sofiène Tahar,
Zijian Zhou:
Verification with Abstract State Machines Using MDGs.
Formal Hardware Verification 1997: 79-113 |
14 | | Francisco Corella,
Zijian Zhou,
Xiaoyu Song,
Michel Langevin,
Eduard Cerny:
Multiway Decision Graphs for Automated Hardware Verification.
Formal Methods in System Design 10(1): 7-46 (1997) |
1996 |
13 | | K. D. Anon,
N. Boulerice,
Eduard Cerny,
Francisco Corella,
Michel Langevin,
Xiaoyu Song,
Sofiène Tahar,
Ying Xu,
Zijian Zhou:
MDG Tools for the Verification of RTL Designs.
CAV 1996: 433-436 |
12 | | Zijian Zhou,
Xiaoyu Song,
Sofiène Tahar,
Eduard Cerny,
Francisco Corella,
Michel Langevin:
Formal Verification of the Island Tunnel Controller Using Multiway Decision Graphs.
FMCAD 1996: 233-247 |
11 | EE | Sofiène Tahar,
Zijian Zhou,
Xiaoyu Song,
Eduard Cerny,
Michel Langevin:
Formal Verification of an ATM Switch Fabric using Multiway Decision Graphs.
Great Lakes Symposium on VLSI 1996: 106-111 |
10 | EE | Michel Langevin,
Sofiène Tahar,
Zijian Zhou,
Xiaoyu Song,
Eduard Cerny:
Behavioral Verification of an ATM Switch Fabric using Implicit Abstract State Enumeration.
ICCD 1996: 20-26 |
9 | EE | Michel Langevin,
Eduard Cerny:
A recursive technique for computing lower-bound performance of schedules.
ACM Trans. Design Autom. Electr. Syst. 1(4): 443-455 (1996) |
1995 |
8 | | Francisco Corella,
Michel Langevin,
Eduard Cerny,
Zijian Zhou,
Xiaoyu Song:
State enumeration with abstract descriptions of state machines.
CHARME 1995: 146-160 |
7 | EE | Zijian Zhou,
Xiaoyu Song,
Francisco Corella,
Eduard Cerny,
Michel Langevin:
Partitioning transition relations efficiently and automatically.
Great Lakes Symposium on VLSI 1995: 106-111 |
6 | EE | Paul-Gerhard Plöger,
Jörg Wilberg,
Michel Langevin,
Raul Camposano:
WWW based structuring of codesigns.
ISSS 1995: 138-143 |
1994 |
5 | | Michel Langevin,
Eduard Cerny,
Jörg Wilberg,
Heinrich Theodor Vierhaus:
Local microcode generation in system design.
Code Generation for Embedded Processors 1994: 171-187 |
4 | | Michel Langevin,
Eduard Cerny:
An Extended OBDD Representation for Extended FSMs.
EDAC-ETC-EUROASIC 1994: 208-213 |
1993 |
3 | | Michel Langevin,
Eduard Cerny:
A Recursive Technique for Computing Lower-Bound Performance of Schedules.
ICCD 1993: 16-20 |
1991 |
2 | | Michel Langevin,
Eduard Cerny:
Comparing Generic State Machines.
CAV 1991: 466-476 |
1990 |
1 | | Michel Langevin:
Automated RTL Verification Based on Predicate Calculus.
CAV 1990: 116-125 |