| 2002 |
|---|
| 29 | EE | Olivier Coudert:
Optimization in an Integrated Physical Design Flow (Tutorial Abstract).
ISQED 2002: 13-14 |
| 28 | EE | Olivier Coudert:
Timing and Design Closure in Physical Design Flows (invited).
ISQED 2002: 511-516 |
| 2001 |
|---|
| 27 | EE | Rob A. Rutenbar,
Olivier Coudert,
Patrick Groeneveld,
Jürgen Koehl,
Scott Peterson,
Vivek Raghavan,
Naresh Soni:
Automatic Hierarchical Design: Fantasy or Reality? (Panel).
ICCAD 2001: 656- |
| 2000 |
|---|
| 26 | EE | Raul Camposano,
Olivier Coudert,
Patrick Groeneveld,
Leon Stok,
Ralph H. J. M. Otten:
Timing closure: the solution and its problems.
ASP-DAC 2000: 359-364 |
| 25 | EE | Olivier Coudert,
Igor L. Markov,
Christoph Meinel,
Ellen Sentovich:
Web-based frameworks to enable CAD RD (abstract).
DAC 2000: 711 |
| 24 | | Olivier Coudert,
Jason Cong,
Sharad Malik,
Majid Sarrafzadeh:
Incremental CAD.
ICCAD 2000: 236-243 |
| 1998 |
|---|
| 23 | EE | Olivier Coudert:
A New Paradigm for Dichotomy-based Constrained Encoding.
DATE 1998: 830-834 |
| 22 | EE | Bwolen Yang,
Randal E. Bryant,
David R. O'Hallaron,
Armin Biere,
Olivier Coudert,
Geert Janssen,
Rajeev K. Ranjan,
Fabio Somenzi:
A Performance Study of BDD-Based Model Checking.
FMCAD 1998: 255-289 |
| 1997 |
|---|
| 21 | EE | Olivier Coudert:
Exact Coloring of Real-Life Graphs is Easy.
DAC 1997: 121-126 |
| 20 | EE | Olivier Coudert:
Solving graph optimization problems with ZBDDs.
ED&TC 1997: 224-228 |
| 19 | EE | Olivier Coudert:
Gate sizing for constrained delay/power/area optimization.
IEEE Trans. VLSI Syst. 5(4): 465-472 (1997) |
| 1996 |
|---|
| 18 | EE | Olivier Coudert:
On Solving Covering Problems.
DAC 1996: 197-202 |
| 17 | EE | Olivier Coudert,
Ramsey W. Haddad,
Srilatha Manne:
New Algorithms for Gate Sizing: A Comparative Study.
DAC 1996: 734-739 |
| 16 | EE | Olivier Coudert,
C.-J. Richard Shi:
Exact Dichotomy-based Constrained Encodi.
ICCD 1996: 426-431 |
| 15 | EE | Olivier Coudert,
Ramsey W. Haddad:
Integrated resynthesis for low power.
ISLPED 1996: 169-174 |
| 14 | EE | Kurt Keutzer,
Olivier Coudert,
Ramsey W. Haddad:
What is the state of the art in commercial EDA tools for low power?
ISLPED 1996: 181-187 |
| 1995 |
|---|
| 13 | EE | Olivier Coudert,
Jean Christophe Madre:
New Ideas for Solving Covering Problems.
DAC 1995: 641-646 |
| 12 | | Olivier Coudert:
Doing Two-Level Logic Minimization 100 Times Faster.
SODA 1995: 112-121 |
| 11 | | Olivier Coudert,
Jean Christophe Madre:
The Implicit Set Paradigm: A New Approach to Finite State System Verification.
Formal Methods in System Design 6(2): 133-145 (1995) |
| 1994 |
|---|
| 10 | | Olivier Coudert,
Jean Christophe Madre:
Une approche intentionnelle du calcul des implicants premiers et essentiels des fonctions booléennes.
ITA 28(2): 125-149 (1994) |
| 1993 |
|---|
| 9 | EE | Olivier Coudert,
Jean Christophe Madre,
Henri Fraisse:
A New Viewpoint on Two-Level Logic Minimization.
DAC 1993: 625-630 |
| 8 | | Olivier Coudert,
Jean Christophe Madre:
Towards a Symbolic Logic Minimization Algorithm.
VLSI Design 1993: 329-334 |
| 1992 |
|---|
| 7 | EE | Olivier Coudert,
Jean Christophe Madre:
Implicit and Incremental Computation of Primes and Essential Primes of Boolean Functions.
DAC 1992: 36-39 |
| 6 | EE | Bill Lin,
Olivier Coudert,
Jean Christophe Madre:
Symbolic Prime Generation for Multiple-Valued Functions.
DAC 1992: 40-44 |
| 1991 |
|---|
| 5 | | Jean Christophe Madre,
Olivier Coudert:
A Logically Complete Reasoning Maintenance System Based on a Logical Constraint Solver.
IJCAI 1991: 294-299 |
| 1990 |
|---|
| 4 | | Olivier Coudert,
Jean Christophe Madre,
Christian Berthet:
Verifying Temporal Properties of Sequential Machines Without Building their State Diagrams.
CAV 1990: 23-32 |
| 3 | EE | Olivier Coudert,
Christian Berthet,
Jean Christophe Madre:
Formal boolean manipulations for the verification of sequential machines.
EURO-DAC 1990: 57-61 |
| 2 | | Olivier Coudert,
Jean Christophe Madre:
A Unified Framework for the Formal Verification of Sequential Circuits.
ICCAD 1990: 126-129 |
| 1989 |
|---|
| 1 | | Olivier Coudert,
Christian Berthet,
Jean Christophe Madre:
Verification of Synchronous Sequential Machines Based on Symbolic Execution.
Automatic Verification Methods for Finite State Systems 1989: 365-373 |
