2009 |
76 | | David R. Kaeli,
Miriam Leeser:
Proceedings of 2nd Workshop on General Purpose Processing on Graphics Processing Units, GPGPU 2009, Washington, DC, USA, March 8, 2009
ACM 2009 |
75 | EE | David R. Kaeli,
Kai Sachs:
Computer Performance Evaluation and Benchmarking, SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings
Springer 2009 |
74 | EE | Perhaad Mistry,
Sherman Braganza,
David R. Kaeli,
Miriam Leeser:
Accelerating phase unwrapping and affine transformations for optical quadrature microscopy using CUDA.
GPGPU 2009: 28-37 |
73 | EE | Byunghyun Jang,
Synho Do,
Homer H. Pien,
David R. Kaeli:
Architecture-aware optimization targeting multithreaded stream computing.
GPGPU 2009: 62-70 |
72 | EE | Vilas Sridharan,
David R. Kaeli:
Eliminating microarchitectural dependency from Architectural Vulnerability.
HPCA 2009: 117-128 |
2008 |
71 | EE | Burak Erem,
Gregory C. Sharp,
Ziji Wu,
David R. Kaeli:
Interactive Deformable Registration Visualization and Analysis of 4D Computed Tomography.
ICMB 2008: 232-239 |
70 | EE | Renato J. O. Figueiredo,
P. Oscar Boykin,
José A. B. Fortes,
Tao Li,
Jie-Kwon Peir,
David Wolinsky,
Lizy Kurian John,
David R. Kaeli,
David J. Lilja,
Sally A. McKee,
Gokhan Memik,
Alain Roy,
Gary S. Tyson:
Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education
CoRR abs/0807.1765: (2008) |
69 | EE | David R. Kaeli,
Miriam Leeser:
Special issue: General-purpose processing using graphics processing units.
J. Parallel Distrib. Comput. 68(10): 1305-1306 (2008) |
68 | EE | David R. Kaeli,
Miriam Leeser:
Acknowledgment to special issue reviewers.
J. Parallel Distrib. Comput. 68(10): 1402 (2008) |
2007 |
67 | | Koen De Bosschere,
David R. Kaeli,
Per Stenström,
David B. Whalley,
Theo Ungerer:
High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings
Springer 2007 |
66 | EE | Alex Aletà,
Josep M. Codina,
Antonio González,
David R. Kaeli:
Heterogeneous Clustered VLIW Microarchitectures.
CGO 2007: 354-366 |
65 | EE | Ke Ning,
David R. Kaeli:
External memory page remapping for embedded multimedia systems.
LCTES 2007: 185-194 |
64 | EE | Michael G. Benjamin,
David R. Kaeli:
Stream Image Processing on a Dual-Core Embedded System.
SAMOS 2007: 149-158 |
63 | EE | Diego Rivera,
Dana Schaa,
Micha Moffie,
David R. Kaeli:
Exploring Novel Parallelization Technologies for 3-D Imaging Applications.
SBAC-PAD 2007: 26-33 |
62 | EE | Brian Mullins,
Hossein Asadi,
Mehdi Baradaran Tahoori,
David R. Kaeli,
Kevin Granlund,
Rudy Bauer,
Scott Romano:
Case Study: Soft Error Rate Analysis in Storage Systems.
VTS 2007: 256-264 |
61 | EE | Ke Ning,
David R. Kaeli:
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems.
T. HiPEAC 1: 116-135 (2007) |
2006 |
60 | EE | Micha Moffie,
Winnie Cheng,
David R. Kaeli,
Qin Zhao:
Hunting Trojan Horses.
ASID 2006: 12-17 |
59 | EE | Hossein Asadi,
Vilas Sridharan,
Mehdi Baradaran Tahoori,
David R. Kaeli:
Vulnerability analysis of L2 cache elements to single event upsets.
DATE 2006: 1276-1281 |
58 | EE | Juemin Zhang,
Waleed Meleis,
David R. Kaeli,
Tao Wu:
Acceleration of Maximum Likelihood Estimation for Tomosynthesis Mammography.
ICPADS (1) 2006: 291-299 |
57 | EE | Dong Ye,
Joydeep Ray,
Christophe Harle,
David R. Kaeli:
Performance Characterization of SPEC CPU2006 Integer Benchmarks on x86-64 Architecture.
IISWC 2006: 120-127 |
56 | EE | Michael G. Benjamin,
David R. Kaeli,
Richard Platcow:
Experiences with the Blackfin architecture in an embedded systems lab.
WCAE 2006: 2 |
55 | EE | Vilas Sridharan,
Hossein Asadi,
Mehdi Baradaran Tahoori,
David R. Kaeli:
Reducing Data Cache Susceptibility to Soft Errors.
IEEE Trans. Dependable Sec. Comput. 3(4): 353-364 (2006) |
54 | EE | Morteza Fayyazi,
David R. Kaeli,
Waleed Meleis:
An adjustable linear time parallel algorithm for maximum weight bipartite matching.
Inf. Process. Lett. 97(5): 186-190 (2006) |
53 | EE | Salvador Petit,
Julio Sahuquillo,
Ana Pont,
David R. Kaeli:
Addressing a workload characterization study to the design of consistency protocols.
The Journal of Supercomputing 38(1): 49-72 (2006) |
2005 |
52 | EE | Yijian Wang,
David R. Kaeli:
Load Balancing using Grid-based Peer-to-Peer Parallel I/O.
CLUSTER 2005: 1-10 |
51 | EE | Salvador Petit,
Julio Sahuquillo,
Jose M. Such,
David R. Kaeli:
Exploiting temporal locality in drowsy cache policies.
Conf. Computing Frontiers 2005: 371-377 |
50 | EE | Ke Ning,
David R. Kaeli:
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems.
HiPEAC 2005: 87-101 |
49 | EE | Ghazanfar-Hossein Asadi,
Vilas Sridharan,
Mehdi Baradaran Tahoori,
David R. Kaeli:
Balancing Performance and Reliability in the Memory Hierarchy.
ISPASS 2005: 269-279 |
48 | EE | Kaushal Sanghai,
Ting Su,
Jennifer G. Dy,
David R. Kaeli:
A multinomial clustering model for fast simulation of computer architecture designs.
KDD 2005: 808-813 |
47 | EE | Alex Aletà,
Josep M. Codina,
Antonio González,
David R. Kaeli:
Demystifying on-the-fly spill code.
PLDI 2005: 180-189 |
46 | EE | Huanmei Wu,
Betty Salzberg,
Gregory C. Sharp,
Steve B. Jiang,
Hiroki Shirato,
David R. Kaeli:
Subsequence Matching on Structured Time Series Data.
SIGMOD Conference 2005: 682-693 |
45 | EE | Dong Ye,
David R. Kaeli:
A reliable return address stack: microarchitectural features to defeat stack smashing.
SIGARCH Computer Architecture News 33(1): 73-80 (2005) |
44 | EE | Derek Uluski,
Micha Moffie,
David R. Kaeli:
Characterizing antivirus workload execution.
SIGARCH Computer Architecture News 33(1): 90-98 (2005) |
2004 |
43 | EE | Jennifer Black,
Emanuel Melachrinoudis,
David R. Kaeli:
Bi-Criteria Models for All-Uses Test Suite Reduction.
ICSE 2004: 106-115 |
42 | EE | Morteza Fayyazi,
David R. Kaeli,
Waleed Meleis:
Parallel Maximum Weight Bipartite Matching Algorithms for Scheduling in Input-Queued Switches.
IPDPS 2004 |
41 | EE | Yijian Wang,
David R. Kaeli:
Execution-Driven Simulation of Network Storage Systems.
MASCOTS 2004: 604-611 |
40 | EE | Ke Ning,
David R. Kaeli:
Bus Power Estimation and Power-Efficient Bus Arbitration for System-on-a-Chip Embedded Systems.
PACS 2004: 95-106 |
39 | EE | Salvador Petit,
Julio Sahuquillo,
Ana Pont,
David R. Kaeli:
Characterizing the Dynamic Behavior of Workload Execution in SVM systems.
SBAC-PAD 2004: 230-237 |
38 | EE | Deniz Balkan,
John Kalamatianos,
David R. Kaeli:
A Study of Errant Pipeline Flushes Caused by Value Misspeculation.
SBAC-PAD 2004: 32-39 |
37 | EE | Chakib Ouarraui,
David R. Kaeli:
Developing object-oriented parallel iterative methods.
IJHPCN 1(1/2/3): 85-90 (2004) |
36 | EE | Alex Aletà,
Josep M. Codina,
Antonio González,
David R. Kaeli:
Removing communications in clustered microarchitectures through instruction replication.
TACO 1(2): 127-151 (2004) |
2003 |
35 | EE | Yijian Wang,
David R. Kaeli:
Profile-guided I/O partitioning.
ICS 2003: 252-260 |
34 | EE | Alex Aletà,
Josep M. Codina,
Antonio González,
David R. Kaeli:
Instruction Replication for Clustered Microarchitectures.
MICRO 2003: 326-338 |
33 | | Morteza Fayyazi,
David R. Kaeli,
Zainalabedin Navabi:
Dynamic Input Buffer Allocation (DIBA) for Fault Tolerant Ethernet Packet Switching.
PDPTA 2003: 819-823 |
32 | EE | Huanmei Wu,
Becky Norum,
Judith Newmark,
Betty Salzberg,
Carol M. Warner,
Charles DiMarzio,
David R. Kaeli:
The CenSSIS Image Database.
SSDBM 2003: 117-126 |
31 | EE | Augustus K. Uht,
David Morano,
Alireza Khalafi,
David R. Kaeli:
Levo - A Scalable Processor With High IPC.
J. Instruction-Level Parallelism 5: (2003) |
30 | EE | David Morano,
Alireza Khalafi,
David R. Kaeli,
Augustus K. Uht:
Realizing high IPC through a scalable memory-latency tolerant multipath microarchitecture.
SIGARCH Computer Architecture News 31(1): 16-25 (2003) |
2002 |
29 | EE | Augustus K. Uht,
Alireza Khalafi,
David Morano,
Marcos de Alba,
David R. Kaeli:
Realizing High IPC Using Time-Tagged Resource-Flow Computing.
Euro-Par 2002: 490-499 |
28 | EE | Alex Aletà,
Josep M. Codina,
F. Jesús Sánchez,
Antonio González,
David R. Kaeli:
Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning.
IEEE PACT 2002: 281-290 |
27 | | Morteza Fayyazi,
David R. Kaeli:
Localized Message Passing Structure for High Speed Ethernet Packet Switching.
PDPTA 2002: 1551-1557 |
2001 |
26 | EE | Haldun Hadimioglu,
David R. Kaeli,
Fabrizio Lombardi:
Introduction to the Special Section on High Performance Memory Systems.
IEEE Trans. Computers 50(11): 1103-1104 (2001) |
25 | EE | Erik R. Altman,
David R. Kaeli:
WBT-2000: workshop on binary translation - 2000.
SIGARCH Computer Architecture News 29(1): 23-25 (2001) |
24 | EE | Erik R. Altman,
David R. Kaeli:
Workshop on binary translation - 2001.
SIGARCH Computer Architecture News 29(5): 84-85 (2001) |
2000 |
23 | EE | Suleyman Sair,
Guiseppe Olivadoti,
David R. Kaeli,
José Fridman:
DSPTune: A Performance Evaluation Toolset for the SHARC Signal Processor.
Annual Simulation Symposium 2000: 51-57 |
22 | | Erik R. Altman,
David R. Kaeli,
Yaron Sheffer:
Welcome to the Opportunities of Binary Translation.
IEEE Computer 33(3): 40-45 (2000) |
1999 |
21 | EE | David R. Kaeli,
Bruce Jacobs:
Fifth Annual Workshop on Computer Education.
HPCA 1999: 320 |
20 | EE | John Kalamatianos,
Alireza Khalafi,
David R. Kaeli,
Waleed Meleis:
Analysis of Temporal-Based Program Behavior for Improved Instruction Cache Performance.
IEEE Trans. Computers 48(2): 168-175 (1999) |
19 | EE | John Kalamatianos,
David R. Kaeli:
Indirect Branch Prediction Using Data Compression Techniques.
J. Instruction-Level Parallelism 1: (1999) |
1998 |
18 | EE | Jason P. Casmira,
John Fraser,
David R. Kaeli,
Waleed Meleis:
Operating System Impact on Trace-Driven Simulation.
Annual Simulation Symposium 1998: 76-82 |
17 | EE | John Kalamatianos,
David R. Kaeli:
Temporal-Based Procedure Reordering for Improved Instruction Cache Performance.
HPCA 1998: 244-253 |
16 | EE | John Kalamatianos,
David R. Kaeli:
Predicting Indirect Branches via Data Compression.
MICRO 1998: 272-281 |
15 | EE | Jason P. Casmira,
David P. Hunter,
David R. Kaeli:
Tracing and Characterization of Windows NT-based System Workloads.
Digital Technical Journal 10(1): 6-21 (1998) |
14 | EE | Stephen Strickland,
Erhan Ergin,
David R. Kaeli,
Paul M. Zavracky:
VLSI design in the 3rd dimension.
Integration 25(1): 1-16 (1998) |
1997 |
13 | EE | Mark S. Squillante,
David R. Kaeli,
Himanshu Sinh:
Analytic Models of Workload Behavior and Pipeline Performance.
MASCOTS 1997: 91- |
12 | | Amir H. Hashemi,
David R. Kaeli,
Brad Calder:
Efficient Procedure Mapping Using Cache Line Coloring.
PLDI 1997: 171-182 |
11 | | David R. Kaeli:
Digital Computer Architecture.
The Computer Science and Engineering Handbook 1997: 412-426 |
10 | EE | David R. Kaeli,
Liana L. Fong,
Richard C. Booth,
Kerry C. Imming,
Joseph P. Weigel:
Performance analysis on a CC-NUMA prototype.
IBM Journal of Research and Development 41(3): 205-214 (1997) |
9 | | David R. Kaeli,
Philip G. Emma:
Improving the Accuracy of History Based Branch Prediction.
IEEE Trans. Computers 46(4): 469-472 (1997) |
1996 |
8 | EE | Angela Sampogna,
David R. Kaeli,
Daniel Green,
Michael Silva,
Christopher J. Sniezek:
Performance Modeling Using Object-Oriented Execution-Driven Simulation.
Annual Simulation Symposium 1996: 183-192 |
7 | EE | Yue Liu,
David R. Kaeli:
Branch-Directed and Stride-Based Data Cache Prefetching.
ICCD 1996: 225-230 |
6 | | S. Belayneh,
H. Sinha,
David R. Kaeli:
Improving Multiprocessor Scalability Using Lockup Free Caches.
PDPTA 1996: 619-622 |
5 | | David R. Kaeli,
O. Richard LaMaire,
Peter P. Hennet,
William W. White,
William J. Starke:
Real-Time Trace Generation.
Int. Journal in Computer Simulation 6(1): 53- (1996) |
1993 |
4 | | David R. Kaeli:
Issues in Trace-Driven Simulation.
Performance/SIGMETRICS Tutorials 1993: 224-244 |
1991 |
3 | EE | David R. Kaeli,
Philip G. Emma:
Branch History Table Prediction of Moving Target Branches due to Subroutine Returns.
ISCA 1991: 34-42 |
2 | EE | Zoran Mijanic,
David R. Kaeli:
A Study of 80X86/80X87 Floating-Point Execution.
SIGSMALL/PC 1991: 28-32 |
1989 |
1 | | David R. Kaeli:
PC Workload Characterization.
SIGMETRICS 1989: 220 |