Mauricio Breternitz Jr.

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15EECheng Wang, Shiliang Hu, Ho-Seop Kim, Sreekumar R. Nair, Mauricio Breternitz Jr., Zhiwei Ying, Youfeng Wu: StarDBT: An Efficient Multi-platform Dynamic Binary Translation System. Asia-Pacific Computer Systems Architecture Conference 2007: 4-15
14EEYoufeng Wu, Mauricio Breternitz Jr., Victor Ying: Impacts of Multiprocessor Configurations on Workloads in Bioinformatics. SBAC-PAD 2007: 105-113
13EEEdson Borin, Mauricio Breternitz Jr., Youfeng Wu, Guido Araujo: Clustering-Based Microcode Compression. ICCD 2006
12EEYoufeng Wu, Mauricio Breternitz Jr., Herbert H. J. Hum, Ramesh V. Peri, Jay Pickett: Enhanced code density of embedded CISC processors with echo technology. CODES+ISSS 2005: 160-165
11EEYoufeng Wu, Mauricio Breternitz Jr., Justin Quek, Orna Etzion, Jesse Fang: The Accuracy of Initial Prediction in Two-Phase Dynamic Binary Translators. CGO 2004: 227-238
10EEYoufeng Wu, Mauricio Breternitz Jr., Tevi Devor: Continuous Trip Count Profiling for Loop Optimizations in Two-Phase Dynamic Binary Translato. Interaction between Compilers and Computer Architectures 2004: 3-12
9EEMauricio Breternitz Jr., Herbert H. J. Hum, Sanjeev Kumar: Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU. IEEE PACT 2003: 135-
8 Mauricio Breternitz Jr., Roger Smith: Enhanced Compression Techniques to Simplify Programm Decompression and Execution. ICCD 1997: 170-176
7 Tariq Afzal, Mauricio Breternitz Jr., M. Kacher, S. Menyhert, M. Ommerman, W. Su: Motorola PowerPC Migration Tools - Emulation and Translation. COMPCON 1996: 145-150
6EEMauricio Breternitz Jr., A. Manikonda, M. Ommerman, W. Su, A. Thornto: Design Tradeoffs and Experience with Motorola PowerPC? Migration Tool. ICCD 1996: 301-
5 Barbara Simons, Vivek Sarkar, Mauricio Breternitz Jr., Michael Lai: An Optimal Asynchronous Scheduling Algorithm for Software Cache Consistence. HICSS (2) 1994: 502-511
4EEMauricio Breternitz Jr., John Paul Shen: Implementation Optimization Techniques for Architecture Synthesis of Application-Specific Processors. MICRO 1991: 114-123
3EEMauricio Breternitz Jr., John Paul Shen: Architecture Synthesis of High-Performance Application-Specific Processors. DAC 1990: 542-548
2 Andrew Wolfe, Mauricio Breternitz Jr., Chriss Stephens, A. L. Ting, D. B. Kirk, Ronald P. Bianchini Jr., John Paul Shen: The White Dwarf: A High-Performance Application-Specific Processor. ISCA 1988: 212-222
1EEMauricio Breternitz Jr., John Paul Shen: Organization of array data for concurrent memory access. MICRO 1988: 97-99

Coauthor Index

1Tariq Afzal [7]
2Guido Araujo [13]
3Ronald P. Bianchini Jr. [2]
4Edson Borin [13]
5Tevi Devor [10]
6Orna Etzion [11]
7Jesse Fang [11]
8Shiliang Hu [15]
9Herbert H. J. Hum [9] [12]
10M. Kacher [7]
11Ho-Seop Kim [15]
12D. B. Kirk [2]
13Sanjeev Kumar [9]
14Michael Lai [5]
15A. Manikonda [6]
16S. Menyhert [7]
17Sreekumar R. Nair [15]
18M. Ommerman [6] [7]
19Ramesh V. Peri [12]
20Jay Pickett [12]
21Justin Quek [11]
22Vivek Sarkar [5]
23John Paul Shen [1] [2] [3] [4]
24Barbara B. Simons (Barbara Simons) [5]
25Roger Smith [8]
26Chriss Stephens [2]
27W. Su [6] [7]
28A. Thornto [6]
29A. L. Ting [2]
30Cheng Wang [15]
31Andrew Wolfe [2]
32Youfeng Wu [10] [11] [12] [13] [14] [15]
33Victor Ying [14]
34Zhiwei Ying [15]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)