| 2001 |
|---|
| 4 | EE | Morgan Hirosuke Miki,
Mamoru Sakamoto,
Shingo Miyamoto,
Yoshinori Takeuchi,
Toyohiko Yoshida,
Isao Shirakawa:
Evaluation of processor code efficiency for embedded systems.
ICS 2001: 229-235 |
| 1998 |
|---|
| 3 | EE | Edgar Holmann,
Toyohiko Yoshida,
Akira Yamada,
Shin-ichi Uramoto:
Single Chip Dual-Issue RISC Processor for Real-Time MPEG-2 Software Decoding.
VLSI Signal Processing 18(2): 155-165 (1998) |
| 1996 |
|---|
| 2 | EE | Mamoru Sakamoto,
Toyohiko Yoshida,
Yasuhiro Nunomura,
Yukihiko Shimazu:
Microarchitecture Support for Reducing Branch Penalty in a Supercscaler Processor.
ICCD 1996: 208-216 |
| 1994 |
|---|
| 1 | | Masahito Matsuo,
Hiroyuki Kondo,
Yukari Takata,
Souichi Kobayashi,
Mitsugu Satoh,
Toyohiko Yoshida,
Yuichi Saitoh,
Jun-ichi Hinata:
A 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface.
ICCD 1994: 203-210 |
