Chune-Sin Yeh

2000
3	EE	Yoshiyuki Kawakami, Jingkun Fang, Hirokazu Yonezawa, Nobufusa Iwanishi, Lifeng Wu, Alvin I-Hsien Chen, Norio Koike, Ping Chen, Chune-Sin Yeh, Zhihong Liu: Gate-level aged timing simulation methodology for hot-carrier reliability assurance. ASP-DAC 2000: 289-294
2	EE	Lifeng Wu, Jingkun Fang, Heting Yan, Ping Chen, Alvin I-Hsien Chen, Yoshifumi Okamoto, Chune-Sin Yeh, Zhihong Liu, Nobufusa Iwanishi, Norio Koike, Hirokazu Yonezawa, Yoshiyuki Kawakami: GLACIER: A Hot Carrier Gate Level Circuit Characterization and Simulation System for VLSI Design. ISQED 2000: 73-80
1990
1	EE	D. David Forsythe, Atul P. Agarwal, Chune-Sin Yeh, Sheldon Aronowitz, Bhaskar Gadepally: NASFLOW, a Simulation Tool for Silicon Technology Development. DAC 1990: 333-337

Coauthor Index

1	Atul P. Agarwal	[1]
2	Sheldon Aronowitz	[1]
3	Alvin I-Hsien Chen	[2] [3]
4	Ping Chen	[2] [3]
5	Jingkun Fang	[2] [3]
6	D. David Forsythe	[1]
7	Bhaskar Gadepally	[1]
8	Nobufusa Iwanishi	[2] [3]
9	Yoshiyuki Kawakami	[2] [3]
10	Norio Koike	[2] [3]
11	Zhihong Liu	[2] [3]
12	Yoshifumi Okamoto	[2]
13	Lifeng Wu	[2] [3]
14	Heting Yan	[2]
15	Hirokazu Yonezawa	[2] [3]

Colors in the list of coauthors