| 1995 |
|---|
| 9 | | Scott vpn Tonningen,
Michael D. Ciletti:
ADM: A New Technique for the Simulation of CMOS Circuit Transients.
ISCAS 1995: 732-735 |
| 1994 |
|---|
| 8 | EE | Weiwei Mao,
Michael D. Ciletti:
Reducing correlation to improve coverage of delay faults in scan-path design.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(5): 638-646 (1994) |
| 1992 |
|---|
| 7 | | Weiwei Mao,
Michael D. Ciletti:
Robustness Enhancement and Detection Threshold Reduction in ATPG for Gate Delay Faults.
ITC 1992: 588-597 |
| 1991 |
|---|
| 6 | EE | Weiwei Mao,
Michael D. Ciletti:
Correlation-Reduced Scan-path Design To Improve Delay Fault Coverage.
DAC 1991: 73-79 |
| 1990 |
|---|
| 5 | EE | Weiwei Mao,
Michael D. Ciletti:
A Variable Observation Time Method for Testing Delay Faults.
DAC 1990: 728-731 |
| 4 | | Weiwei Mao,
Ravi K. Gulati,
Deepak K. Goel,
Michael D. Ciletti:
QUIETEST: A Quiescent Current Testing Methodology for Detecting Leakage Faults.
ICCAD 1990: 280-283 |
| 3 | EE | Weiwei Mao,
Michael D. Ciletti:
DYTEST: a self-learning algorithm using dynamic testability measures to accelerate test generation.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(8): 893-898 (1990) |
| 1989 |
|---|
| 2 | EE | Weiwei Mao,
Michael D. Ciletti:
A Simplified Six-waveform Type Method for Delay Fault Testing.
DAC 1989: 730-733 |
| 1988 |
|---|
| 1 | EE | Weiwei Mao,
Michael D. Ciletti:
Dytest: A Self-Learning Algorithm Using Dynamic Testability Measures to Accelerate Test Generation.
DAC 1988: 591-596 |
