| 2003 |
|---|
| 12 | EE | Haluk Konuk,
Leon Xiao:
DFFT : Design For Functional Testability.
ITC 2003: 1105-1114 |
| 2002 |
|---|
| 11 | EE | C.-H. Chia,
Sujit Dey,
Faraydon Karim,
Haluk Konuk,
Keesup Kim:
Validation and Test of Network Processors and ASICs.
VTS 2002: 407-410 |
| 2000 |
|---|
| 10 | | Haluk Konuk:
On invalidation mechanisms for non-robust delay tests.
ITC 2000: 393-399 |
| 1999 |
|---|
| 9 | EE | Haluk Konuk:
Voltage- and current-based fault simulation for interconnect open defects.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(12): 1768-1779 (1999) |
| 1998 |
|---|
| 8 | EE | Haluk Konuk,
F. Joel Ferguson:
Oscillation and sequential behavior caused by opens in the routing in digital CMOS circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1200-1210 (1998) |
| 1997 |
|---|
| 7 | EE | Haluk Konuk:
Fault simulation of interconnect opens in digital CMOS circuits.
ICCAD 1997: 548-554 |
| 6 | | Haluk Konuk,
F. Joel Ferguson:
Oscillation and Sequential Behavior Caused by Interconnect Opens in Digital CMOS Circuits.
ITC 1997: 597-606 |
| 1996 |
|---|
| 5 | EE | Haluk Konuk,
F. Joel Ferguson:
An unexpected factor in testing for CMOS opens: the die surface.
VTS 1996: 422-429 |
| 4 | EE | Haluk Konuk,
F. Joel Ferguson,
Tracy Larrabee:
Charge-based fault simulation for CMOS network breaks.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1555-1567 (1996) |
| 1995 |
|---|
| 3 | EE | Haluk Konuk,
F. Joel Ferguson,
Tracy Larrabee:
Accurate and Efficient Fault Simulation of Realistic CMOS Network Breaks.
DAC 1995: 345-351 |
| 1994 |
|---|
| 2 | | Bill Underwood,
Wai-On Law,
Sungho Kang,
Haluk Konuk:
Fastpath: A Path-Delay Test Generator for Standard Scan Designs.
ITC 1994: 154-163 |
| 1990 |
|---|
| 1 | EE | Christos A. Papachristou,
Haluk Konuk:
A Linear Program Driven Scheduling and Allocation Method Followed by an Interconnect Optimization Algorithm.
DAC 1990: 77-83 |
