| |
| 1991 | ||
|---|---|---|
| 2 | EE | Yutaka Deguchi, Nagisa Ishiura, Shuzo Yajima: Probabilistic CTSS: Analysis of Timing Error Probability in Asynchronous Logic Circuits. DAC 1991: 650-655 |
| 1990 | ||
| 1 | EE | Nagisa Ishiura, Yutaka Deguchi, Shuzo Yajima: Coded Time-Symbolic Simulation Using Shared Binary Decision Diagram. DAC 1990: 130-135 |
| 1 | Nagisa Ishiura | [1] [2] |
| 2 | Shuzo Yajima | [1] [2] |