| 2008 |
| 9 | EE | Wenyi Feng,
Sinan Kaptanoglu:
Designing Efficient Input Interconnect Blocks for LUT Clusters Using Counting and Entropy.
TRETS 1(1): (2008) |
| 2007 |
| 8 | EE | Wenyi Feng,
Sinan Kaptanoglu:
Designing efficient input interconnect blocks for LUT clusters using counting and entropy.
FPGA 2007: 23-32 |
| 2004 |
| 7 | EE | Michael Hutton,
Jay Schleicher,
David M. Lewis,
Bruce Pedersen,
Richard Yuan,
Sinan Kaptanoglu,
Gregg Baeckler,
Boris Ratchev,
Ketan Padalia,
Mark Bourgeault,
Andy Lee,
Henry Kim,
Rahul Saini:
Improving FPGA Performance and Area Using an Adaptive Logic Module.
FPL 2004: 135-144 |
| 2003 |
| 6 | EE | Sinan Kaptanoglu:
System LSI Implementation Fabrics for the Future (special panel discussion).
ICCD 2003: 410- |
| 2001 |
| 5 | EE | Sinan Kaptanoglu,
John East,
Tim Garverick,
Scott Hauck,
Tavana Tavana,
Steven Trimberger,
Ronnie Vasishta:
Is marriage in the cards for programmable logic, microprocessors and ASICs?
FPGA 2001: 111 |
| 1999 |
| 4 | EE | Sinan Kaptanoglu,
Greg Bakker,
Arun Kundu,
Ivan Corneillet,
Ben Ting:
A New High Density and Very Low Cost Reprogrammable FPGA Architecture.
FPGA 1999: 3-12 |
| 1998 |
| 3 | EE | Jonathan Rose,
Sinan Kaptanoglu,
Clive McCarthy,
Rob Smith,
Sandip Vij,
Steve Taylor:
Constraints from Hell: How to Tell Makes a Good FPGA (Panel).
FPGA 1998: 117-119 |
| 1990 |
| 2 | EE | Jonathan W. Greene,
Vwani P. Roychowdhury,
Sinan Kaptanoglu,
Abbas El Gamal:
Segmented Channel Routing.
DAC 1990: 567-572 |
| 1 | EE | John Valainis,
Sinan Kaptanoglu,
Erwin Liu,
Roberto Suaya:
Two-dimensional IC layout compaction based on topological design rule checking.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(3): 260-275 (1990) |