| 2002 |
|---|
| 7 | EE | H. Chang,
Eugene Shragowitz,
Jian Liu,
Habib Youssef,
Bing Lu,
Suphachai Sutanthavibul:
Net criticality revisited: an effective method to improve timing in physical design.
ISPD 2002: 155-160 |
| 1993 |
|---|
| 6 | EE | Suphachai Sutanthavibul,
Eugene Shragowitz,
Rung-Bin Lin:
An adaptive timing-driven placement for high performance VLSIs.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1488-1498 (1993) |
| 1992 |
|---|
| 5 | EE | Habib Youssef,
Eugene Shragowitz,
Suphachai Sutanthavibul:
Prelayout timing analysis of cell-based VLSI designs.
Computer-Aided Design 24(7): 367-379 (1992) |
| 1991 |
|---|
| 4 | EE | Suphachai Sutanthavibul,
Eugene Shragowitz:
Dynamic Prediction of Critical Paths and Nets for Constructive Timing-Driven Placement.
DAC 1991: 632-635 |
| 3 | EE | Suphachai Sutanthavibul,
Eugene Shragowitz,
J. Ben Rosen:
An analytical approach to floorplan design and optimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(6): 761-769 (1991) |
| 1990 |
|---|
| 2 | EE | Suphachai Sutanthavibul,
Eugene Shragowitz,
J. Ben Rosen:
An Analytical Approach to Floorplan Design and Optimization.
DAC 1990: 187-192 |
| 1 | EE | Suphachai Sutanthavibul,
Eugene Shragowitz:
An Adaptive Timing-Driven Layout for High Speed VLSI.
DAC 1990: 90-95 |
