| 2002 |
|---|
| 7 | EE | Aarti Gupta,
Albert E. Casavant,
Pranav Ashar,
X. G. Liu,
Akira Mukaiyama,
Kazutoshi Wakabayashi:
Property-Specific Testbench Generation for Guided Simulation.
VLSI Design 2002: 524- |
| 2001 |
|---|
| 6 | EE | Albert E. Casavant,
Aarti Gupta,
S. Liu,
Akira Mukaiyama,
Kazutoshi Wakabayashi,
Pranav Ashar:
Property-specific witness graph generation for guided simulation.
DATE 2001: 799 |
| 1998 |
|---|
| 5 | | Ti-Yen Yen,
Alex Ishii,
Albert E. Casavant,
Wayne Wolf:
Efficient Algorithms for Interface Timing Verification.
Formal Methods in System Design 12(3): 241-265 (1998) |
| 1994 |
|---|
| 4 | EE | Albert E. Casavant:
MIST - A Design Aid for Programmable Pipelined Processors.
DAC 1994: 532-536 |
| 3 | EE | Ti-Yen Yen,
Wayne Wolf,
Albert E. Casavant,
Alex Ishii:
Efficient algorithms for interface timing verification.
EURO-DAC 1994: 34-39 |
| 2 | EE | Richard I. Hartley,
Albert E. Casavant:
Optimizing pipelined networks of associative and commutative operators.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(11): 1418-1425 (1994) |
| 1990 |
|---|
| 1 | EE | Kristen N. McNall,
Albert E. Casavant:
Automatic Operator Configuration in the Synthesis of Pipelined Architectures.
DAC 1990: 174-179 |
