| 2007 |
|---|
| 6 | EE | Hiroaki Tanaka,
Yoshinori Takeuchi,
Keishi Sakanushi,
Masaharu Imai,
Hiroki Tagawa,
Yutaka Ota,
Nobu Matsumoto:
Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram.
IEICE Transactions 90-A(12): 2800-2809 (2007) |
| 2006 |
|---|
| 5 | EE | Hiroaki Tanaka,
Yoshinori Takeuchi,
Keishi Sakanushi,
Masaharu Imai,
Yutaka Ota,
Nobu Matsumoto,
Masaki Nakagawa:
Pack instruction generation for media pUsing multi-valued decision diagram.
CODES+ISSS 2006: 154-159 |
| 2002 |
|---|
| 4 | EE | Atsushi Mizuno,
Kazuyoshi Kohno,
Ryuichiro Ohyama,
Takahiro Tokuyoshi,
Hironori Uetani,
Hans Eichel,
Takashi Miyamori,
Nobu Matsumoto,
Masataka Matsui:
Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture.
ICCD 2002: 2-7 |
| 2001 |
|---|
| 3 | EE | Kazuyoshi Kohno,
Nobu Matsumoto:
A New Verification Methodology for Complex Pipeline Behavior.
DAC 2001: 816-821 |
| 1993 |
|---|
| 2 | EE | Joseph Dao,
Nobu Matsumoto,
Tsuneo Hamai,
Chusei Ogawa,
Shojiro Mori:
A Compaction Method for Full Chip VLSI Layouts.
DAC 1993: 407-412 |
| 1990 |
|---|
| 1 | EE | Nobu Matsumoto,
Yoko Watanabe,
Kimiyoshi Usami,
Yukio Sugeno,
Hiroshi Hatada,
Shojiro Mori:
Datapath Generator Based on Gate-Level Symbolic Layout.
DAC 1990: 388-393 |
