Shen Lin

other persons with the same name:

• Shen Lin
• Shen Lin
• Shen Lin

2008
16	EE	Ling Ming, Zhang Yu, Shen Lin: An Alternative Choice of Scratch-Pad Memory for Energy Optimization in Embedded System. ICNSC 2008: 1641-1647
2007
15	EE	Aveek Sarkar, Shen Lin, Kai Wang: A methodology for analysis and verification of power gated circuits with correlated results. ISLPED 2007: 351-354
2002
14	EE	Yu Cao, Xuejue Huang, N. H. Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Dennis Sylvester, Chenming Hu: Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion. IEEE Trans. VLSI Syst. 10(6): 799-805 (2002)
2001
13	EE	Shen Lin, Norman Chang: Challenges in Power-Ground Integrity. ICCAD 2001: 651-
12	EE	Yu Cao, Xuejue Huang, Chenming Hu, Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie: Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion. ISQED 2001: 185-190
11	EE	Zhenyu Tang, Lei He, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa: Instruction Prediction for Step Power Reduction. ISQED 2001: 211-216
2000
10	EE	Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Lei He: Clocktree RLC Extraction with Efficient Inductance Modeling. DATE 2000: 522-
9	EE	Zhiping Yu, Dan Yergeau, Robert W. Dutton, O. Sam Nakagawa, Norman Chang, Shen Lin, Weize Xie: Full Chip Thermal Simulation. ISQED 2000: 145-150
8	EE	Shen Lin, Norman Chang, O. Sam Nakagawa: Quick On-Chip Self- and Mutual-Inductance Screen. ISQED 2000: 513-
7	EE	Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa, Lei He: Ramp Up/Down Functional Unit to Reduce Step Power. PACS 2000: 13-24
1995
6	EE	Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. Kuh: Techniques for fast circuit simulation applied to power estimation of CMOS circuits. ISLPD 1995: 135-138
1994
5	EE	Shen Lin, C. K. Wong: Process-variation-tolerant clock skew minimization. ICCAD 1994: 284-288
1993
4		Shen Lin, Ernest S. Kuh: Circuit simulation for large interconnected IC networks. VLSI 1993: 333-342
3	EE	Shen Lin, Ernest S. Kuh, Malgorzata Marek-Sadowska: Stepwise equivalent conductance circuit simulation technique. IEEE Trans. on CAD of Integrated Circuits and Systems 12(5): 672-683 (1993)
1992
2	EE	Shen Lin, Ernest S. Kuh: Transient Simulation of Lossy Interconnect. DAC 1992: 81-86
1990
1	EE	Shen Lin, Malgorzata Marek-Sadowska, Ernest S. Kuh: Delay and Area Optimization in Standard-Cell Design. DAC 1990: 349-352

Coauthor Index

1	Premal Buch	[6]
2	Yu Cao	[12] [14]
3	N. H. Chang	[14]
4	Norman Chang	[7] [8] [9] [10] [11] [12] [13]
5	Robert W. Dutton	[9]
6	Lei He	[7] [10] [11]
7	Chenming Hu	[12] [14]
8	Xuejue Huang	[12] [14]
9	Ernest S. Kuh	[1] [2] [3] [4] [6]
10	Malgorzata Marek-Sadowska	[1] [3]
11	Ling Ming	[16]
12	Vijay Nagasamy	[6]
13	O. Sam Nakagawa	[7] [8] [9] [10] [11] [12] [14]
14	Aveek Sarkar	[15]
15	Dennis Sylvester	[14]
16	Zhenyu Tang	[7] [11]
17	Kai Wang	[15]
18	Chak-Kuen Wong (C. K. Wong)	[5]
19	Weize Xie	[7] [9] [10] [11] [12] [14]
20	Dan Yergeau	[9]
21	Zhang Yu	[16]
22	Zhiping Yu	[9]

Colors in the list of coauthors