| |
| 1993 | ||
|---|---|---|
| 5 | EE | Tai A. Ly, Jack T. Mowchenko: Applying simulated evolution to high level synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 12(3): 389-409 (1993) |
| 1991 | ||
| 4 | EE | Tai A. Ly, Jack T. Mowchenko: Bottom Up Synthesis Based on Fuzzy Schedules. DAC 1991: 674-679 |
| 1990 | ||
| 3 | EE | Tai A. Ly, W. Lloyd Elwood, Emil F. Girczyc: A Generalized Interconnect Model for Data Path Synthesis. DAC 1990: 168-173 |
| 1988 | ||
| 2 | EE | Tai A. Ly, Emil F. Girczyc: Constraint Propagation in an Object-Oriented IC Design Environment. DAC 1988: 628-633 |
| 1987 | ||
| 1 | EE | Emil F. Girczyc, Tai A. Ly: STEM: An IC Design Environment Based on the Smalltalk Model-View-Controller Construct. DAC 1987: 757-763 |
| 1 | W. Lloyd Elwood | [3] |
| 2 | Emil F. Girczyc | [1] [2] [3] |
| 3 | Jack T. Mowchenko | [4] [5] |