7. VLSI Design 1994:
Calcutta,
India
Proceedings of the Seventh International Conference on VLSI Design,
January 5-8,
1994,
Calcutta,
India. IEEE Computer Society,
1994,
ISBN 0-8186-4990-9
Keynote Address
Plenary Session Invited Talk
1. High Level Synthesis 1
- Ahmed Hemani, Börje Karlsson, Mats Fredriksson, Kurt Nordqvist, Björn Fjellborg:
Application of High-Level Synthesis in an Industrial Project.
5-10 BibTeX
- Pradip K. Jha, Champaka Ramachandran, Nikil D. Dutt, Fadi J. Kurdahi:
An Empirical Study on the Effects of Physical Design in High-Level Synthesis.
11-16 BibTeX
- Samit Chaudhuri, Robert A. Walker:
ILP-Based Scheduling with Time and Resource Constraints in High Level Synthesis.
17-20 BibTeX
- A. R. Naseer, M. Balakrishnan, Anshul Kumar:
FAST: FPGA Targeted RTL Structure Synthesis Technique.
21-24 BibTeX
- David J. Kolson, Nikil D. Dutt, Alexandru Nicolau:
Ultra Fine-Grain Template-Driven Synthesis.
25-28 BibTeX
2. Parallel Algorithms
- Sharad C. Seth, Lee Gowen, Matt Payne, Don Sylwester:
Logic Simulation Using an Asynchronous Parallel Discrete-Event Simulation Model on a SIMD Machine.
29-32 BibTeX
- Abhaya Asthana, Mike Laznovsky, Boyd Mathews:
SEMU: A Parallel Processing System for Timing Simulation of Digital CMOS VLSI Circuits.
33-38 BibTeX
- C. V. Ramamoorthy, Vikram Vij:
CM-SIM: A Parallel Circuit Simulator on a Distributed Memory Multiprocessor.
39-44 BibTeX
- Prathima Agrawal, Sanjay Goil, Sally Liu, John A. Trotter:
Parallel Model Evaluation for Circuit Simulation on the PACE Multiprocessor.
45-48 BibTeX
- Dharmavani Bhagavathi, Stephan Olariu, James L. Schwing, Jingyuan Zhang:
Time- and Cost-Optimal Parallel Algorithms for the Dominance and Visibility Graphs.
49-52 BibTeX
3. Analog Circuits
4. Digital Signal Processing
5. Design for Testability
6. Routing
7. High Level Synthesis 2
- Pradip K. Jha, Nikil D. Dutt:
Rapid Technology Projection for High-Level Synthesis.
155-158 BibTeX
- Yinghua Min, Yutang Zhou, Zhongcheng Li, Cheng Ye, Yuqi Pan:
Behavioral Design and Prototyping of a Fail-Safe System.
159-162 BibTeX
- Ashutosh Majumdar, Minjoong Rim, Rajiv Jain, Renato De Leone:
BINET: An Algorithm for Solving the Binding Problem.
163-168 BibTeX
- S. Nandi, Vamsi Boppana, Parimal Pal Chaudhuri:
A CAD Tool for Design of On-Chip Store & Generate Scheme.
169-174 BibTeX
- Neeta Ganguly, Vijay Pitchumani:
HSIM1 and HSIM2: Object Oriented Algorithms for VHDL Simulation.
175-178 BibTeX
8. CMOS Testing
9. Layout
10. FPGA
11. ASIC and Logic Design
12. Low Power VLSI
13. Algorithms/Architectures
14. Testing/Fault Simulation
15. VLSI Technology
- G. Hari Rama Krishna, Nirmal B. Chakrabarti, Swapna Banerjee:
Finite Element Analysis of SIGe npn HBT.
319-322 BibTeX
- Srikanth Natarajan, Debapriya Sahu, Sattam Dasgupta:
nOHM - A Multi-Process Device Synthesis Tool for Lateral DMOS Structures.
323-327 BibTeX
- Shuvendu K. Lahiri, M. K. Das, A. Das Gupta, I. Manna:
3D Effects in VLSI/ULSI MOSFETs: A Novel Analytical Approach to Model Threshold Voltage.
328-332 BibTeX
- M. K. Kidambi, Akhilesh Tyagi, Mohammed R. Madani, Magdy A. Bayoumi:
Parameterized Modeling of Open-Circuit Critical Volume for Three-Dimensional Defects in VLSI Processing.
333-338 BibTeX
- A. Bandyopadhyay, P. R. Verma, A. B. Bhattacharyya, M. J. Zarabi:
LATCHSIM - A Lath-Up Simulator in VLSI CAD Environment for CMOS and BiCMOS Circuits.
339-342 BibTeX
16. VLSI/WSI Arrays
17. FSM Synthesis
18. Design Space Exploration
- Pallab Dasgupta, Prasenjit Mitra, P. P. Chakrabarti, S. C. De Sarkar:
Multiobjective Search in VLSI Design.
395-400 BibTeX
- James Sienicki, Michael L. Bushnell, Sandip Parikh:
Graphical Methodology Language for CAD Frameworks.
401-406 BibTeX
- Santonu Sarkar, Anupam Basu:
An Object Oriented Environment for Modeling and Synthesis of Hardware Circuits.
407-412 BibTeX
- Mourad B. Takla, Donald W. Bouldin, Daniel B. Koch:
Early Exploration of the Multi-Dimensional VLSI Design Space.
413-416 BibTeX
- Yatin Vasant Hoskote, John Moondanos, Jacob A. Abraham, Donald S. Fussell:
Verification of Circuits Described in VHDL through Extraction of Design Intent.
417-420 BibTeX
Copyright © Sat May 16 23:46:41 2009
by Michael Ley (ley@uni-trier.de)
