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Mandyam-Komar Srinivas

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1998
9EELakshminarayana Pappu, Michael L. Bushnell, Vishwani D. Agrawal, Mandyam-Komar Srinivas: Statistical Delay Fault Coverage Estimation for Synchronous Sequential Circuits. J. Electronic Testing 12(3): 239-254 (1998)
1997
8EEMandyam-Komar Srinivas, Michael L. Bushnell, Vishwani D. Agrawal: Flags and Algebra for Sequential Circuit VNR Path Delay Fault Test Generation. VLSI Design 1997: 88-94
1996
7EELakshminarayana Pappu, Michael L. Bushnell, Vishwani D. Agrawal, Mandyam-Komar Srinivas: Statistical path delay fault coverage estimation for synchronous sequential circuits. VLSI Design 1996: 290-295
6EEMandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal: Functional test generation for synchronous sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 15(7): 831-843 (1996)
1995
5EEMandyam-Komar Srinivas, Vishwani D. Agrawal, Michael L. Bushnell: Functional test generation for path delay faults. Asian Test Symposium 1995: 339-345
4EEMandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal: Functional test generation for non-scan sequential circuits. VLSI Design 1995: 47-52
1994
3 P. R. Suresh Kumar, James Jacob, Mandyam-Komar Srinivas, Vishwani D. Agrawal: An Improved Deductive Fault Simulator. VLSI Design 1994: 307-310
1993
2 P. R. Suresh Kumar, Mandyam-Komar Srinivas, James Jacob: Efficient Technique to Reduce Gate Evaluations and Speed Up Fault Simulation. VLSI Design 1993: 104
1992
1 Mandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal: Finite State Machine Testing Based on Growth and Dissappearance Faults. FTCS 1992: 238-245

Coauthor Index

1Vishwani D. Agrawal [1] [3] [4] [5] [6] [7] [8] [9]
2Michael L. Bushnell [5] [7] [8] [9]
3James Jacob [1] [2] [3] [4] [6]
4P. R. Suresh Kumar [2] [3]
5Lakshminarayana Pappu [7] [9]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)