| 1994 |
|---|
| 6 | | Champaka Ramachandran,
Fadi J. Kurdahi:
Incorporating the Controller Effects During Register Transfer Level Synthesis.
EDAC-ETC-EUROASIC 1994: 308-313 |
| 5 | | Pradip K. Jha,
Champaka Ramachandran,
Nikil D. Dutt,
Fadi J. Kurdahi:
An Empirical Study on the Effects of Physical Design in High-Level Synthesis.
VLSI Design 1994: 11-16 |
| 4 | EE | Lars W. Hagen,
Andrew B. Kahng,
Fadi J. Kurdahi,
Champaka Ramachandran:
On the intrinsic Rent parameter and spectra-based partitioning methodologies.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(1): 27-37 (1994) |
| 3 | EE | Champaka Ramachandran,
Fadi J. Kurdahi:
Combined topological and functionality-based delay estimation using a layout-driven approach for high-level applications.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(12): 1450-1460 (1994) |
| 1993 |
|---|
| 2 | EE | Fadi J. Kurdahi,
Champaka Ramachandran:
Evaluating layout area tradeoffs for high level applications.
IEEE Trans. VLSI Syst. 1(1): 46-55 (1993) |
| 1992 |
|---|
| 1 | EE | Champaka Ramachandran,
Fadi J. Kurdahi,
Daniel Gajski,
Allen C.-H. Wu,
Viraphol Chaiyakul:
Accurate layout area and delay modeling for system level design.
ICCAD 1992: 355-361 |
