| |
| 2005 | ||
|---|---|---|
| 5 | EE | Rajeev Madhavan: Silicon compilation: the answer to reducing IC development costs. ASP-DAC 2005 |
| 4 | EE | Rajeev Madhavan: The death of logic synthesis. ISPD 2005: 1 |
| 2003 | ||
| 3 | EE | Rajeev Madhavan: India-Building the Tall, Thin VLSI Engineer. VLSI Design 2003: 5 |
| 2000 | ||
| 2 | EE | Dan Schweikert, Joseph B. Costello, Rajeev Madhavan, Y. C. Pati, Judy Owen, Steve Carlson, Moshe Gavrielov: Emerging companies - acquiring minds want to know (panel session). DAC 2000: 814-815 |
| 1994 | ||
| 1 | Dundar Dumlugol, Don Webber, Rajeev Madhavan: Analog Modeling Using Event-Driven HDL's. VLSI Design 1994: 53-56 | |
| 1 | Steve Carlson | [2] |
| 2 | Joseph B. Costello | [2] |
| 3 | Dundar Dumlugol | [1] |
| 4 | Moshe Gavrielov | [2] |
| 5 | Judy Owen | [2] |
| 6 | Y. C. Pati | [2] |
| 7 | Dan Schweikert | [2] |
| 8 | Don Webber | [1] |