| 2005 |
|---|
| 13 | | Donald W. Bouldin:
Enabling Killer Applications of Reconfigurable Systems: ERSA Keynote and Introduction.
ERSA 2005: 7-16 |
| 12 | EE | Saumil Merchant,
Gregory D. Peterson,
Donald W. Bouldin:
Improving Embedded Systems Education: Laboratory Enhancements Using Programmable Systems on Chip.
MSE 2005: 5-6 |
| 2004 |
|---|
| 11 | EE | Donald W. Bouldin:
Impacting Education Using FPGAs.
IPDPS 2004 |
| 2003 |
|---|
| 10 | EE | Donald W. Bouldin,
Adam Miller,
Chandra Tan:
Teaching Custom Integrated Circuit Design and Verification.
MSE 2003: 139-140 |
| 2002 |
|---|
| 9 | | Jeanne M. Lehrter,
Faisal N. Abu-Khzam,
Donald W. Bouldin,
Michael A. Langston,
Gregory D. Peterson:
On Special-purpose Hardware Clusters for High-performance Computational Grids.
IASTED PDCS 2002: 1-5 |
| 1999 |
|---|
| 8 | EE | Benjamin A. Levine,
Senthil Natarajan,
Chandra Tan,
Danny Newport,
Donald W. Bouldin:
Mapping of an Automated Target Recognition Application from a Graphical Software Environment to FPGA-Based Reconfigurable Hardware.
FCCM 1999: 292-293 |
| 7 | EE | Donald W. Bouldin,
Senthil Natarajan,
Benjamin A. Levine,
Chandra Tan,
Danny Newport:
Training IP Creators and Integrators.
MSE 1999: 12-13 |
| 1997 |
|---|
| 6 | EE | Chandra Tan,
Donald W. Bouldin,
Peyman H. Dehkordi:
Design Implementation of Intrinsic Area Array ICs.
ARVLSI 1997: 82-95 |
| 1994 |
|---|
| 5 | | Mourad B. Takla,
Donald W. Bouldin,
Daniel B. Koch:
Early Exploration of the Multi-Dimensional VLSI Design Space.
VLSI Design 1994: 413-416 |
| 1993 |
|---|
| 4 | | Peyman H. Dehkordi,
Donald W. Bouldin:
Design for Packageability: Early Consideration of Packaging from a VLSI Designer's Viewpoint.
IEEE Computer 26(4): 76-81 (1993) |
| 1989 |
|---|
| 3 | | Donald W. Bouldin:
The Push for Test in Universities.
ITC 1989: 246-246 |
| 1988 |
|---|
| 2 | | Philip L. Butler,
J. D. Allen Jr.,
Donald W. Bouldin:
Parallel Architecture for OPS5.
ISCA 1988: 452-457 |
| 1985 |
|---|
| 1 | | Mark A. Shell,
Donald W. Bouldin,
Paul D. Manhardt:
Design and Implementation of a VLSI Systolic Array for Solving Nonlinear Partial Differential Equations.
ICPP 1985: 96-98 |
