| 2007 |
| 45 | EE | Ka-Ming Keung,
Vineela Manne,
Akhilesh Tyagi:
A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump.
IEEE Trans. VLSI Syst. 15(7): 733-745 (2007) |
| 2006 |
| 44 | EE | Ka-Ming Keung,
Akhilesh Tyagi:
State space reconfigurability: an implementation architecture for self modifying finite automata.
CASES 2006: 83-92 |
| 43 | EE | Ka-Ming Keung,
Akhilesh Tyagi:
SRAM CP: A Charge Recycling Design Schema for SRAM.
PATMOS 2006: 95-106 |
| 42 | EE | Mahadevan Gomathisankaran,
Akhilesh Tyagi:
Architecture Support for 3D Obfuscation.
IEEE Trans. Computers 55(5): 497-507 (2006) |
| 41 | EE | Mahadevan Gomathisankaran,
Akhilesh Tyagi:
WARM SRAM: A Novel Scheme to Reduce Static Leakage Energy in SRAM Arrays.
J. Low Power Electronics 2(3): 388-400 (2006) |
| 2005 |
| 40 | EE | Pramod Ramarao,
Akhilesh Tyagi:
An Integrated Partitioning and Scheduling Based Branch Decoupling.
Asia-Pacific Computer Systems Architecture Conference 2005: 252-268 |
| 39 | EE | Mahadevan Gomathisankaran,
Akhilesh Tyagi:
TIVA: Trusted Integrity Verification Architecture.
DRMTICS 2005: 13-31 |
| 38 | EE | Brian Blietz,
Akhilesh Tyagi:
Software Tamper Resistance Through Dynamic Program Monitoring.
DRMTICS 2005: 146-163 |
| 37 | EE | Jun Ge,
Soma Chaudhuri,
Akhilesh Tyagi:
Control flow based obfuscation.
Digital Rights Management Workshop 2005: 83-92 |
| 36 | EE | Mahadevan Gomathisankaran,
Akhilesh Tyagi:
Arc3D: A 3D Obfuscation Architecture.
HiPEAC 2005: 184-199 |
| 35 | EE | Akhilesh Tyagi:
Energy-Privacy Trade-Offs in VLSI Computations.
INDOCRYPT 2005: 361-374 |
| 2004 |
| 34 | EE | Sriram Nadathur,
Akhilesh Tyagi:
IPC Driven Dynamic Associative Cache Architecture for Low Energy.
ICCD 2004: 472-479 |
| 33 | EE | Mahadevan Gomathisankaran,
Akhilesh Tyagi:
WARM SRAM: A Novel Scheme to Reduce Static Leakage Energy in SRAM Arrays.
ISVLSI 2004: 105-114 |
| 32 | EE | Ge Zhu,
Akhilesh Tyagi:
Protection against Indirect Overflow Attacks on Pointers.
IWIA 2004: 97-106 |
| 2003 |
| 31 | EE | Sriram Nadathur,
Akhilesh Tyagi:
A Dependence Driven Efficient Dispatch Scheme.
ICCD 2003: 299-306 |
| 30 | EE | Pramod Ramarao,
Akhilesh Tyagi,
Gyungho Lee:
Run-Time Support for Detection of Memory Access Violations to Prevent Buffer Overflow Exploits.
ISC 2003: 366-380 |
| 29 | EE | Pramod Ramarao,
Akhilesh Tyagi:
An Adiabatic Framework for a Low Energy µ-Architecture & Compiler.
Interaction between Compilers and Computer Architectures 2003: 65-74 |
| 28 | EE | Vineela Manne,
Akhilesh Tyagi:
An Adiabatic Charge Pump Based Charge Recycling Design Style.
PATMOS 2003: 299-308 |
| 27 | EE | Sonal Pandey,
Arun K. Somani,
Akhilesh Tyagi:
Intermediate processing protocol for processing within IP-routed networks.
Microprocessors and Microsystems 27(5-6): 285-295 (2003) |
| 2002 |
| 26 | EE | Huesung Kim,
Arun K. Somani,
Akhilesh Tyagi:
Adaptive Balanced Computing (ABC) Microprocessor Using Reconfigurable Functional Caches (RFCs).
ICCD 2002: 138-144 |
| 2001 |
| 25 | | Vadhiraj Sankaranarayanan,
Akhilesh Tyagi:
A Hierarchical Dependence Check and Folded Rename Mapping Based Scalable Dispatch Stage.
ICCD 2001: 249-255 |
| 24 | EE | Huesung Kim,
Arun K. Somani,
Akhilesh Tyagi:
A reconfigurable multifunction computing cache architecture.
IEEE Trans. VLSI Syst. 9(4): 509-523 (2001) |
| 2000 |
| 23 | EE | Huesung Kim,
Arun K. Somani,
Akhilesh Tyagi:
A reconfigurable multi-function computing cache architecture.
FPGA 2000: 85-94 |
| 22 | EE | Anshuman S. Nadkarni,
Akhilesh Tyagi:
A Trace Based Evaluation of Speculative Branch Decoupling.
ICCD 2000: 300- |
| 21 | | Gyungho Lee,
Akhilesh Tyagi:
Encoded Program Counter: Self-Protection from Buffer Overflow Attacks.
International Conference on Internet Computing 2000: 387-394 |
| 20 | | Gyungho Lee,
Akhilesh Tyagi:
Instruction-level Distributed Microarchitecture Based on Data Decoupling.
PDPTA 2000 |
| 1999 |
| 19 | EE | Deepali Deshpande,
Arun K. Somani,
Akhilesh Tyagi:
Hybrid Data/Configuration Caching for Striped FPGAs.
FCCM 1999: 294-295 |
| 18 | EE | Huesung Kim,
Arun K. Somani,
Akhilesh Tyagi:
On Reconfiguring Cache for Computing.
FCCM 1999: 296-297 |
| 17 | EE | Deepali Deshpande,
Arun K. Somani,
Akhilesh Tyagi:
Configuration Caching Vs Data Caching for Striped FPGAs.
FPGA 1999: 206-214 |
| 16 | EE | Akhilesh Tyagi,
Hon-Chi Ng,
Prasant Mohapatra:
Dynamic Branch Decoupled Architecture.
ICCD 1999: 442- |
| 1998 |
| 15 | EE | M. K. Kidambi,
Akhilesh Tyagi,
Mohammed R. Madani,
Magdy A. Bayoumi:
Three-dimensional defect sensitivity modeling for open circuits in ULSI structures.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 366-371 (1998) |
| 1997 |
| 14 | EE | Prasoon Surti,
Liang-Fang Chao,
Akhilesh Tyagi:
Low power FSM design using Huffman-style encoding.
ED&TC 1997: 521-525 |
| 13 | EE | Glenn Holt,
Akhilesh Tyagi:
Minimizing interconnect energy through integrated low-power placement and combinational logic synthesis.
ISPD 1997: 48-53 |
| 1996 |
| 12 | EE | Akhilesh Tyagi:
Entropic bounds on FSM switching.
ISLPED 1996: 323-328 |
| 1995 |
| 11 | EE | Glenn Holt,
Akhilesh Tyagi:
EPNR: an energy-efficient automated layout synthesis package.
ICCD 1995: 224-229 |
| 10 | EE | Vamshi Veeramachaneni,
Akhilesh Tyagi,
Suresh Rajgopal:
Re-encoding for low power state assignment of FSMs.
ISLPD 1995: 173-178 |
| 1994 |
| 9 | | M. K. Kidambi,
Akhilesh Tyagi,
Mohammed R. Madani,
Magdy A. Bayoumi:
Parameterized Modeling of Open-Circuit Critical Volume for Three-Dimensional Defects in VLSI Processing.
VLSI Design 1994: 333-338 |
| 1993 |
| 8 | | H. Kumar,
Magdy A. Bayoumi,
Akhilesh Tyagi,
Nam Ling,
R. Kalyan:
Parallel Implementation of a Cut and Paste Maze Routing Algorithm.
ISCAS 1993: 2035-2038 |
| 7 | | Akhilesh Tyagi:
A Module Generator Development Environment: Area Estimation and Design-Space Exploration Encapsulation.
VLSI Design 1993: 214-217 |
| 6 | | Akhilesh Tyagi:
A Reduced-Area Scheme for Carry-Select Adders.
IEEE Trans. Computers 42(10): 1163-1170 (1993) |
| 1992 |
| 5 | EE | Akhilesh Tyagi:
VLSI design parsing (preliminary version).
ICCAD 1992: 30-34 |
| 1990 |
| 4 | EE | Akhilesh Tyagi:
An algebraic model for design space with applications to function module generation.
EURO-DAC 1990: 114-118 |
| 3 | | John H. Reif,
Akhilesh Tyagi:
Efficient Parallel Algorithms for Optical Computing with the DFT Primitive.
FSTTCS 1990: 149-160 |
| 2 | EE | Akhilesh Tyagi,
John H. Reif:
Energy complexity of optical computations.
SPDP 1990: 14-21 |
| 1989 |
| 1 | | Akhilesh Tyagi:
Energy-Time Trade-offs in VLSI Computation.
FSTTCS 1989: 301-311 |