1999 |
8 | EE | Harry Hengster,
Bernd Becker:
Synthesis of Circuits Derived from Decision Diagrams - Combining Small Delay and Testability.
FTCS 1999: 268-275 |
7 | EE | Rolf Drechsler,
Harry Hengster,
Horst Schäfer,
Joachim Hartmann,
Bernd Becker:
Testability of 2-Level AND/EXOR Circuits.
J. Electronic Testing 14(3): 219-225 (1999) |
1997 |
6 | EE | Rolf Drechsler,
Harry Hengster,
Horst Schäfer,
Joachim Hartmann,
Bernd Becker:
Testability of 2-level AND/EXOR circuits.
ED&TC 1997: 548-553 |
1996 |
5 | EE | Harry Hengster,
Rolf Drechsler,
Bernd Becker,
Stefan Eckrich,
Tonja Pfeiffer:
AND/EXOR based Synthesis of Testable KFDD-Circuits with Small Depth.
Asian Test Symposium 1996: 148- |
4 | | Harry Hengster,
Uwe Sparmann,
Bernd Becker,
Sudhakar M. Reddy:
Local Transformations and Robust Dependent Path Delay.
ITC 1996: 347-356 |
1995 |
3 | EE | Harry Hengster,
Rolf Drechsler,
Bernd Becker:
On the application of local circuit transformations with special emphasis on path delay fault testability.
VTS 1995: 387-392 |
2 | EE | Harry Hengster,
Rolf Drechsler,
Bernd Becker:
On local transformations and path delay fault testability.
J. Electronic Testing 7(3): 173-191 (1995) |
1994 |
1 | | Harry Hengster,
Rolf Drechsler,
Bernd Becker:
Testability Properties of Local Circuit Transformations with Respect to the Robust Path-Delay-Fault Model.
VLSI Design 1994: 123-126 |