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Harry Hengster

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1999
8EEHarry Hengster, Bernd Becker: Synthesis of Circuits Derived from Decision Diagrams - Combining Small Delay and Testability. FTCS 1999: 268-275
7EERolf Drechsler, Harry Hengster, Horst Schäfer, Joachim Hartmann, Bernd Becker: Testability of 2-Level AND/EXOR Circuits. J. Electronic Testing 14(3): 219-225 (1999)
1997
6EERolf Drechsler, Harry Hengster, Horst Schäfer, Joachim Hartmann, Bernd Becker: Testability of 2-level AND/EXOR circuits. ED&TC 1997: 548-553
1996
5EEHarry Hengster, Rolf Drechsler, Bernd Becker, Stefan Eckrich, Tonja Pfeiffer: AND/EXOR based Synthesis of Testable KFDD-Circuits with Small Depth. Asian Test Symposium 1996: 148-
4 Harry Hengster, Uwe Sparmann, Bernd Becker, Sudhakar M. Reddy: Local Transformations and Robust Dependent Path Delay. ITC 1996: 347-356
1995
3EEHarry Hengster, Rolf Drechsler, Bernd Becker: On the application of local circuit transformations with special emphasis on path delay fault testability. VTS 1995: 387-392
2EEHarry Hengster, Rolf Drechsler, Bernd Becker: On local transformations and path delay fault testability. J. Electronic Testing 7(3): 173-191 (1995)
1994
1 Harry Hengster, Rolf Drechsler, Bernd Becker: Testability Properties of Local Circuit Transformations with Respect to the Robust Path-Delay-Fault Model. VLSI Design 1994: 123-126

Coauthor Index

1Bernd Becker [1] [2] [3] [4] [5] [6] [7] [8]
2Rolf Drechsler [1] [2] [3] [5] [6] [7]
3Stefan Eckrich [5]
4Joachim Hartmann [6] [7]
5Tonja Pfeiffer [5]
6Sudhakar M. Reddy [4]
7Horst Schäfer [6] [7]
8Uwe Sparmann [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)