2001 |
16 | EE | Hakan Yalcin,
Robert Palermo,
Mohammad Mortazavi,
Cyrus Bamji,
Karem A. Sakallah,
John P. Hayes:
An Advanced Timing Characterization Method Using Mode Dependency.
DAC 2001: 657-660 |
15 | EE | Yanbin Jiang,
Sachin S. Sapatnekar,
Cyrus Bamji:
Technology mapping for high-performance static CMOS and pass transistor logic designs.
IEEE Trans. VLSI Syst. 9(5): 577-589 (2001) |
14 | EE | Hakan Yalcin,
Mohammad Mortazavi,
Robert Palermo,
Cyrus Bamji,
Karem A. Sakallah,
John P. Hayes:
Fast and accurate timing characterization using functionalinformation.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(2): 315-331 (2001) |
2000 |
13 | | Pawan Kulshreshtha,
Robert Palermo,
Mohammad Mortazavi,
Cyrus Bamji,
Hakan Yalcin:
Transistor-Level Timing Analysis Using Embedded Simulation.
ICCAD 2000: 344-348 |
1999 |
12 | EE | Hakan Yalcin,
Mohammad Mortazavi,
Robert Palermo,
Cyrus Bamji,
Karem A. Sakallah:
Functional Timing Analysis for IP Characterization.
DAC 1999: 731-736 |
1998 |
11 | EE | Cyrus Bamji,
Ravi Varadarajan:
Incremental Autojogging using Range Spaces.
VLSI Design 1998: 265- |
10 | | Cyrus Bamji,
Manjit Borah:
An Improved Cost Heuristic for Transistor Sizing.
VLSI Design 1998: 534- |
9 | EE | Yanbin Jiang,
Sachin S. Sapatnekar,
Cyrus Bamji,
Juho Kim:
Interleaving buffer insertion and transistor sizing into a single optimization.
IEEE Trans. VLSI Syst. 6(4): 625-633 (1998) |
1997 |
8 | EE | Juho Kim,
Cyrus Bamji,
Yanbin Jiang,
Sachin S. Sapatnekar:
Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs.
ISPD 1997: 130-135 |
1996 |
7 | EE | Cyrus Bamji,
Enrico Malavasi:
Enhanced Network Flow Algorithm for Yield Optimization.
DAC 1996: 746-751 |
1994 |
6 | | Cyrus Bamji,
Jonathan Allen:
GLOVE: A Graph-Based Layout Verifier.
VLSI Design 1994: 215-220 |
1993 |
5 | EE | Cyrus Bamji,
Ravi Varadarajan:
MSTC: A Method for Identifying Overconstraints during Hierarchical Compaction.
DAC 1993: 389-394 |
1992 |
4 | EE | Cyrus Bamji,
Ravi Varadarajan:
Hierarchical Pitchmatching Compaction Using Minimum Design.
DAC 1992: 311-317 |
3 | EE | Ravi Varadarajan,
Cyrus Bamji:
Cloning techniques for hierarchical compaction.
ICCAD 1992: 158-161 |
1989 |
2 | EE | Cyrus Bamji,
Jonathan Allen:
GRASP: A Grammar-based Schematic Parser.
DAC 1989: 448-453 |
1985 |
1 | EE | Cyrus Bamji,
Charles E. Hauck,
Jonathan Allen:
A design by example regular structure generator.
DAC 1985: 16-22 |