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Magdy Bayoumi
List of publications from the DBLP Bibliography Server - FAQ
2009 | ||
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150 | EE | Charbel J. Akl, Rafic A. Ayoubi, Magdy A. Bayoumi: An effective staggered-phase damping technique for suppressing power-gating resonance noise during mode transition. ISQED 2009: 116-119 |
149 | EE | Charbel J. Akl, Rafic A. Ayoubi, Magdy A. Bayoumi: Post-Silicon Clock-nvert (PSCI) for reducing process-variation induced skew in buffered clock networks. ISQED 2009: 794-798 |
2008 | ||
148 | EE | Charbel J. Akl, Magdy A. Bayoumi: Assumers for high-speed single and multi-cycle on-chip interconnect with low repeater count. ACM Great Lakes Symposium on VLSI 2008: 327-332 |
147 | EE | Milad Ghantous, Soumik Ghosh, Magdy Bayoumi: A gradient-based hybrid image fusion scheme using object extraction. ICIP 2008: 1300-1303 |
146 | EE | Jason McNeely, Yasser Ismail, Magdy A. Bayoumi, Peiyi Zhao: Power analysis of the Huffman decoding tree. ICIP 2008: 1416-1419 |
145 | EE | Mohsen Shaaban, Magdy Bayoumi: An efficient frequency domain intra prediction for H.264/AVC. ICIP 2008: 2460-2463 |
144 | EE | Md. Ibrahim Faisal, Magdy A. Bayoumi: A low-area, low-power programmable frequency multiplier for DLL based clock synthesizers. ISCAS 2008: 1460-1463 |
143 | EE | Charbel J. Akl, Magdy A. Bayoumi: Cost-effective and low-power memory address bus encodings. ISCAS 2008: 2010-2013 |
142 | EE | Abhijit Sil, Eswar Prasad Kolli, Soumik Ghosh, Magdy Bayoumi: High speed single-ended pseudo differential current sense amplifier for SRAM cell. ISCAS 2008: 3330-3333 |
141 | EE | Yasser Ismail, Jason McNeely, Mohsen Shaaban, Magdy A. Bayoumi: A generalized fast motion estimation algorithm using external and internal stop search techniques for H.264 video coding standard. ISCAS 2008: 3574-3577 |
140 | EE | Charbel J. Akl, Magdy A. Bayoumi: Reducing wakeup latency and energy of MTCMOS circuits via keeper insertion. ISLPED 2008: 69-74 |
139 | EE | Charbel J. Akl, Magdy A. Bayoumi: Feedback-Switch Logic (FSL): A High-Speed Low-Power Differential Dynamic-Like Static CMOS Circuit Family. ISQED 2008: 385-390 |
138 | EE | Azeez Sanusi, Nan Wang, Magdy A. Bayoumi: Guaranteeing QoS with the pipelined multi-channel central caching NoC communication architecture. SoCC 2008: 75-78 |
137 | EE | Charbel J. Akl, Magdy A. Bayoumi: Wiring-Area Efficient Simultaneous Bidirectional Point-to-Point Link for Inter-Block On-Chip Signaling. VLSI Design 2008: 195-200 |
136 | EE | Charbel J. Akl, Magdy A. Bayoumi: Self-Sleep Buffer for Distributed MTCMOS Design. VLSI Design 2008: 673-678 |
135 | EE | Miriam J. Akl, Magdy A. Bayoumi: Transition Skew Coding for Global On-Chip Interconnect. IEEE Trans. VLSI Syst. 16(8): 1091-1096 (2008) |
134 | EE | Charbel J. Akl, Magdy A. Bayoumi: Reducing Interconnect Delay Uncertainty via Hybrid Polarity Repeater Insertion. IEEE Trans. VLSI Syst. 16(9): 1230-1239 (2008) |
2007 | ||
133 | EE | Charbel J. Akl, Magdy A. Bayoumi: Transition Skew Coding: A Power and Area Efficient Encoding Technique for Global On-Chip Interconnects. ASP-DAC 2007: 696-701 |
132 | EE | Jason McNeely, Magdy Bayoumi: Low Power Lookup Tables for Huffman Decoding. ICIP (6) 2007: 465-468 |
131 | EE | Xiaodong Zhang, Magdy Bayoumi: A Low Power 4-bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio. ISCAS 2007: 1165-1168 |
130 | EE | Peiyi Zhao, Jason McNeely, Magdy A. Bayoumi, Golconda Pradeep Kumar, Weidong Kuang: A Low Power Domino with Differential-Controlled-Keeper. ISCAS 2007: 1625-1628 |
129 | EE | Abu Baker, Soumik Ghosh, Ashok Kumar, Magdy A. Bayoumi, Rafic A. Ayoubi: Design and Realization of Analog Phi-Function for LDPC Decoder. ISCAS 2007: 1661-1664 |
128 | EE | Ruth Aguilar-Ponce, J. Luis Tecpanecatl-Xihuitl, Ashok Kumar, Magdy Bayoumi: Pixel-Level Image Fusion Scheme based on Linear Algebra. ISCAS 2007: 2658-2661 |
127 | EE | A. Abdelgawad, Magdy Bayoumi: High Speed and Area-Efficient Multiply Accumulate (MAC) Unit for Digital Signal Prossing Applications. ISCAS 2007: 3199-3202 |
126 | EE | Yasser Ismail, Mohsen Shaaban, Magdy Bayoumi: An Adaptive Block Size Phase Correlation Motion Estimation Using Adaptive Early Search Termination Technique. ISCAS 2007: 3423-3426 |
125 | EE | Zaher Merhi, Mohamed A. Elgamel, Magdy Bayoumi: Fully Decentralized Weighted Kalman Filter for Wireless Sensor Networks with FuzzyART Neural Networks. ISCC 2007: 643-648 |
124 | EE | Charbel J. Akl, Magdy A. Bayoumi: Reducing Delay Uncertainty of On-Chip Interconnects by Combining Inverting and Non-Inverting Repeaters Insertion. ISQED 2007: 219-224 |
123 | EE | J. Luis Tecpanecatl-Xihuitl, Ruth Aguilar-Ponce, Magdy Bayoumi: Hybrid multiplierless FIR filter architecture based on NEDA. VLSI-SoC 2007: 316-319 |
122 | EE | Peiyi Zhao, Jason McNeely, Pradeep Golconda, Magdy A. Bayoumi, Robert A. Barcenas, Weidong Kuang: Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop. IEEE Trans. VLSI Syst. 15(3): 338-345 (2007) |
121 | EE | Mitun Bhattacharyya, Ashok Kumar, Magdy Bayoumi: A framework for assessing residual energy in wireless sensor network. IJSNet 2(3/4): 256-272 (2007) |
120 | EE | Ruth Aguilar-Ponce, Ashok Kumar, J. Luis Tecpanecatl-Xihuitl, Magdy Bayoumi: A network of sensor-based framework for automated visual surveillance. J. Network and Computer Applications 30(3): 1244-1271 (2007) |
2006 | ||
119 | EE | Sumeer Goel, Magdy A. Bayoumi: Multi-Path Search Algorithm for Block-Based Motion Estimation. ICIP 2006: 2373-2376 |
118 | EE | Xiaodong Zhang, Magdy A. Bayoumi: A low power adaptive transmitter architecture for low band UWB applications. ISCAS 2006 |
117 | EE | Md. Ibrahim Faisal, Magdy A. Bayoumi, Peiyi Zhao: A low-power clock frequency multiplier. ISCAS 2006 |
116 | EE | Yijun Li, Magdy A. Bayoumi: A power-efficient architecture for EBCOT tier-1 in JPEG 2000. ISCAS 2006 |
115 | Mitun Bhattacharyya, Ashok Kumar, Magdy Bayoumi: Intelligent Mechanisms for Energy Reduction in Design of Wireless Sensor Networks using Learning Methods. Integrated Intelligent Systems for Engineering Design 2006: 325-344 | |
114 | EE | Yijun Li, Magdy A. Bayoumi: A Three-Level Parallel High-Speed Low-Power Architecture for EBCOT of JPEG 2000. IEEE Trans. Circuits Syst. Video Techn. 16(9): 1153-1163 (2006) |
113 | EE | Sumeer Goel, Ashok Kumar, Magdy A. Bayoumi: Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style. IEEE Trans. VLSI Syst. 14(12): 1309-1321 (2006) |
112 | EE | Ahmed M. Shams, Archana Chidanandan, Wendi Pan, Magdy A. Bayoumi: NEDA: a low-power high-performance DCT architecture. IEEE Transactions on Signal Processing 54(3): 955-964 (2006) |
111 | EE | Yijun Li, Hongyi Wu, Nian-Feng Tzeng, Dmitri D. Perkins, Magdy Bayoumi: MAC-SCC: a medium access control protocol with separate control channel for reconfigurable multi-hop wireless networks. IEEE Transactions on Wireless Communications 5(7): 1805-1817 (2006) |
110 | EE | Hanan A. Mahmoud, Sumeer Goel, Mohsen Shaaban, Magdy Bayoumi: A New Efficient Block-Matching Algorithm for Motion Estimation. VLSI Signal Processing 42(1): 21-33 (2006) |
109 | EE | Magdy A. Bayoumi, Nam Ling, Samia A. Mashali: Editorial. VLSI Signal Processing 42(1): 5-6 (2006) |
108 | EE | Ramy E. Aly, Magdy A. Bayoumi: High-Speed and Low-Power IP for Embedded Block Coding with Optimized Truncation (EBCOT) Sub-Block in JPEG2000 System Implementation. VLSI Signal Processing 42(2): 139-148 (2006) |
2005 | ||
107 | EE | Walid Elgharbawy, Pradeep Golconda, Magdy A. Bayoumi: Noise-tolerant high fan-in dynamic CMOS circuit design. ACM Great Lakes Symposium on VLSI 2005: 134-137 |
106 | EE | Ruth Aguilar-Ponce, Ashok Kumar, J. Luis Tecpanecatl-Xihuitl, Magdy A. Bayoumi: An Architecture for Automated Scene Understanding. CAMP 2005: 19-24 |
105 | Nan Wang, Magdy A. Bayoumi: Fraction Control Bus: A New SoC On-chip Communication Architecture Design. ESA 2005: 124-129 | |
104 | EE | Mahmoud Elassal, Ashok Kumar, Magdy Bayoumi: A systematic framework for high throughput MAP decoder VLSI architectures. ISCAS (1) 2005: 29-32 |
103 | EE | Ashok Kumar, J. Luis Tecpanecatl-Xihuitl, Magdy A. Bayoumi: Low complexity decimation filter for multi-standard digital receivers. ISCAS (1) 2005: 552-555 |
102 | EE | Ramy E. Aly, Mohamed A. Elgamel, Magdy A. Bayoumi: Dual sense amplified bit lines (DSABL) architecture for low-power SRAM design. ISCAS (2) 2005: 1650-1653 |
101 | EE | Walid Elgharbawy, Pradeep Golconda, Ashok Kumar, Magdy Bayoumi: A new gate-level body biasing technique for PMOS transistors in subthreshold CMOS circuits. ISCAS (5) 2005: 4697-4700 |
100 | EE | Yijun Li, Mohamed A. Elgamel, Magdy A. Bayoumi: A partial parallel algorithm and architecture for arithmetic encoder in JPEG2000. ISCAS (5) 2005: 5198-5201 |
99 | EE | Archana Chidanandan, Magdy A. Bayoumi: Novel systolic array architecture for the decorrelator using conjugate gradient for least squares algorithm. ISCAS (6) 2005: 5437-5440 |
98 | EE | Soumik Ghosh, Soujanya Venigalla, Magdy Bayoumi: Design and Implementaion of a 2D-DCT Architecture Using Coefficient Distributed Arithmetic. ISVLSI 2005: 162-166 |
97 | EE | Magdy Bayoumi: Wireless Sensor Networks: A New Life Paradigm. PATMOS 2005: 749 |
96 | EE | Mohamed A. Elgamel, Ashok Kumar, Magdy A. Bayoumi: Efficient shield insertion for inductive noise reduction in nanometer technologies. IEEE Trans. VLSI Syst. 13(3): 401-405 (2005) |
95 | EE | Ruth Aguilar-Ponce, Ashok Kumar, J. Luis Tecpanecatl-Xihuitl, Magdy Bayoumi: Autonomous Decentralized Systems Based Approach to Object Detection in Sensor Clusters. IEICE Transactions 88-B(12): 4462-4469 (2005) |
94 | EE | Mohamed A. Elgamel, Md. Ibrahim Faisal, Magdy A. Bayoumi: Noise Metrics in Flip-Flop Designs. IEICE Transactions 88-D(7): 1501-1505 (2005) |
93 | EE | Ashok Kumar, Magdy A. Bayoumi: A Fast Scheduling Algorithm for Low Power Design. Journal of Circuits, Systems, and Computers 14(4): 735-756 (2005) |
92 | EE | Tarek Darwish, Magdy Bayoumi: Coefficient Elimination Algorithm for Low Energy Distributed Arithmetic DCT Architectures. VLSI Signal Processing 40(3): 355-369 (2005) |
2004 | ||
91 | Walid Elgharbawy, Magdy A. Bayoumi: B-DTNMOS: a novel bulk dynamic threshold NMOS scheme. ISCAS (2) 2004: 413-416 | |
90 | Peiyi Zhao, Golconda Pradeep Kumar, Magdy Bayoumi: Contention reduced/conditional discharge flip-flops for level conversion in CVS systems. ISCAS (2) 2004: 669-672 | |
89 | Archana Chidanandan, Magdy A. Bayoumi: Enhanced Parallel Interference Cancellation using Decorrelator for the base-station receiver. ISCAS (4) 2004: 341-344 | |
88 | Yijun Li, Mahmoud Elassal, Magdy A. Bayoumi: Power efficient architecture for (3, 6)-regular low-density parity-check code decoder. ISCAS (4) 2004: 81-84 | |
87 | Rafic A. Ayoubi, Haissam Ziade, Magdy A. Bayoumi: Hopfield associative memory on mesh. ISCAS (5) 2004: 800-803 | |
86 | EE | Walid Elgharbawy, Magdy A. Bayoumi: New Bulk Dynamic Threshold NMOS Schemes for Low-Energy Subthreshold Domino-Like Circui. ISVLSI 2004: 115-120 |
85 | EE | Peiyi Zhao, Golconda Pradeep Kumar, C. Archana, Magdy A. Bayoumi: A Double-Edge Implicit-Pulsed Level Convert Flip-Flop. ISVLSI 2004: 141-144 |
84 | Peiyi Zhao, Tarek Darwish, Magdy A. Bayoumi: High-performance and low-power conditional discharge flip-flop. IEEE Trans. VLSI Syst. 12(5): 477-484 (2004) | |
83 | EE | Ashok Kumar, Magdy A. Bayoumi, Mohamed A. Elgamel: A methodology for low power scheduling with resources operating at multiple voltages. Integration 37(1): 29-62 (2004) |
82 | EE | Mohamed A. Elgamel, Magdy A. Bayoumi, Ahmed M. Shams, Bertrand Zavidovique: Low Power Full Search Block Matching Motion Estimation Vlsi Architectures. Journal of Circuits, Systems, and Computers 13(6): 1271-1288 (2004) |
81 | EE | Wael M. Badawy, Magdy Bayoumi: A Low Power Architecture for HASM Motion Tracking. VLSI Signal Processing 37(1): 111-127 (2004) |
2003 | ||
80 | EE | Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi: Noise tolerant low voltage XOR-XNOR for fast arithmetic. ACM Great Lakes Symposium on VLSI 2003: 285-288 |
79 | EE | Rafic A. Ayoubi, Haissam Ziade, Magdy A. Bayoumi: Fault Tolerant Hopfield Associative Memory on Torus. DFT 2003: 369-376 |
78 | Peiyi Zhao, Tarek Darwish, Magdy A. Bayoumi: Low Power Conditional-Discharge Pulsed Flip-Flops. Embedded Systems and Applications 2003: 204-209 | |
77 | EE | Yijun Li, Hongyi Wu, Dmitri D. Perkins, Nian-Feng Tzeng, Magdy A. Bayoumi: MAC-SCC: Medium Access Control with a Separate Control Channel for Multihop Wireless Networks. ICDCS Workshops 2003: 764-769 |
76 | EE | Mohamed A. Elgamel, Kannan S. Tharmalingam, Magdy A. Bayoumi: Noise-constrained interconnect optimization for nanometer technologies. ISCAS (5) 2003: 481-484 |
75 | EE | Mohamed A. Elgamel, Kannan S. Tharmalingam, Magdy A. Bayoumi: Crosstalk Noise Analysis in Ultra Deep Submicrometer Technologies. ISVLSI 2003: 189-192 |
74 | EE | Sumeer Goel, Tarek Darwish, Magdy A. Bayoumi: A Novel Technique for Noise-Tolerance in Dynamic Circuits. ISVLSI 2003: 203-206 |
73 | EE | Mohamed A. Elgamel, Magdy A. Bayoumi: Minimum-Area Shield Insertion for Explicit Inductive Noise Reduction. SBCCI 2003: 256-260 |
72 | EE | Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi: Novel Design Methodology for High-Performance XOR-XNOR Circuit Design. SBCCI 2003: 71- |
71 | Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi: Energy Efficient and Noise-Tolerant XOR-XNOR Circuit Design. VLSI 2003: 125-130 | |
70 | EE | Rafic A. Ayoubi, Magdy A. Bayoumi: Efficient Mapping Algorithm of Multilayer Neural Network on Torus Architecture. IEEE Trans. Parallel Distrib. Syst. 14(9): 932-943 (2003) |
69 | EE | Michael Weeks, Magdy Bayoumi: Discrete Wavelet Transform: Architectures, Design and Performance Issues. VLSI Signal Processing 35(2): 155-178 (2003) |
2002 | ||
68 | EE | Mahmoud Elassal, Magdy Bayoumi: Low power SOVA architecture using bi-directional scheme. ISCAS (1) 2002: 277-280 |
67 | EE | Ayman A. Fayed, Magdy A. Bayoumi: Noise-tolerant design and analysis for a low-voltage dynamic full adder cell. ISCAS (3) 2002: 579-582 |
66 | EE | Ahmed M. Shams, Wendi Pan, Archana Chidanandan, Magdy A. Bayoumi: A Low Power High Performance Distributed DCT Architecture. ISVLSI 2002: 26-34 |
65 | EE | Mohamed A. Elgamel, Tarek Darwish, Magdy A. Bayoumi: Noise Tolerant Low Power Dynamic TSPCL D Flip-Flops. ISVLSI 2002: 89-94 |
64 | Mohamed A. Elgamel, Magdy A. Bayoumi: On Low Power High Level Synthesis Using Genetic Algorithms. IWLS 2002: 37-40 | |
63 | Wael M. Badawy, Magdy Bayoumi: Algorithm-based low-power VLSI architecture for 2D mesh video-object motion tracking. IEEE Trans. Circuits Syst. Video Techn. 12(4): 227-237 (2002) | |
62 | EE | Ahmed M. Shams, T. K. Darwish, Magdy A. Bayoumi: Performance analysis of low-power 1-bit CMOS full adder cells. IEEE Trans. VLSI Syst. 10(1): 20-29 (2002) |
61 | EE | Wael M. Badawy, Magdy Bayoumi: A Multiplication-Free Algorithm and A Parallel Architecture for Affine Transformation. VLSI Signal Processing 31(2): 173-184 (2002) |
2001 | ||
60 | EE | Ayman A. Fayed, Magdy A. Bayoumi: A low power 10-transistor full adder cell for embedded architectures. ISCAS (4) 2001: 226-229 |
59 | EE | Wael M. Badawy, Magdy A. Bayoumi: A mesh based motion tracking architecture. ISCAS (4) 2001: 262-265 |
58 | EE | Mohamed A. Elgamel, Ahmed M. Shams, Xi Xueling, Magdy A. Bayoumi: Enhanced low power motion estimation VLSI architectures for video compression. ISCAS (4) 2001: 474-477 |
57 | EE | Hanan A. Mahmoud, Magdy A. Bayoumi: An Efficient Low-Bit Rate Adaptive Mesh-Based Motion Compensation Technique. Workshop on Digital and Computational Video 2001: 164-172 |
56 | EE | Ahmed M. Shams, Mohamed A. Elgamel, Magdy A. Bayoumi: Hybrid Mesh-Based/Block-Based Motion Compensation Architecture. Workshop on Digital and Computational Video 2001: 194-201 |
2000 | ||
55 | EE | Ahmed M. Shams, Magdy A. Bayoumi: A 108 Gbps, 1.5 GHz 1D-DCT Architecture. ASAP 2000: 163-172 |
54 | EE | Wael M. Badawy, Magdy A. Bayoumi: A Multiplication-Free Parallel Architecture for Affine Transformation. ASAP 2000: 25-34 |
53 | EE | Wael M. Badawy, Magdy Bayoumi: A Scalable Affine Core for Video Object Motion Compensation. CAMP 2000: 142-146 |
52 | EE | Beth Wilson, Magdy A. Bayoumi: Compressed-Domain Classification of Texture Images. CAMP 2000: 347-355 |
51 | EE | Hanan A. Mahmoud, Magdy A. Bayoumi: An Efficient Successive Elimination Algorithm for Block-Matching Motion Estimation. Data Compression Conference 2000: 559 |
50 | EE | Hanan A. Mahmoud, Magdy A. Bayoumi: An Efficient Low-Bit Rate Motion Compensation Technique Based on Quadtree. Data Compression Conference 2000: 560 |
49 | EE | Beth Wilson, Magdy A. Bayoumi: Compressed Domain Texture Classification from a Modified EZW Symbol Stream. Data Compression Conference 2000: 579 |
48 | EE | Wael M. Badawy, Magdy A. Bayoumi: Low Power Video Object Motion-Tracking Architecture for Very Low Bit Rate Online Video Applications. ICCD 2000: 533-536 |
47 | Hanan A. Mahmoud, Magdy A. Bayoumi: A New Block-Matching Motion Estimation Algorithm Based on Successive Elimination. ICIP 2000 | |
46 | Hanan A. Mahmoud, Magdy A. Bayoumi: An Efficient Low-Bit Rate Motion Compensation Technique Based on Quadtree. IEEE International Conference on Multimedia and Expo (I) 2000: 213-216 | |
45 | Hanan A. Mahmoud, Magdy A. Bayoumi: Low-bit-rate generalized quad-tree motion compensation algorithm and its optimal encoding schemes. VCIP 2000: 230-237 | |
44 | Hanan A. Mahmoud, Magdy A. Bayoumi: Video codec incorporating block-based multihypothesis motion-compensated prediction. VCIP 2000: 238-251 | |
1999 | ||
43 | EE | Ashok Kumar, Magdy A. Bayoumi: Novel Formulations for Low-Power Binding of Function Units in High-Level Synthesis. ICCD 1999: 321-324 |
42 | EE | Guoqing Zhang, M. Talley, Wael M. Badawy, Michael Weeks, Magdy A. Bayoumi: A low power prototype for a 3D discrete wavelet transform processor. ISCAS (1) 1999: 145-148 |
41 | EE | Ahmed M. Shams, Magdy A. Bayoumi: Performance evaluation of 1-bit CMOS adder cells. ISCAS (1) 1999: 27-30 |
40 | EE | Ashok Kumar, Magdy A. Bayoumi: Multiple voltage-based scheduling methodology for low power in the high level synthesis. ISCAS (1) 1999: 371-374 |
39 | EE | Hanan A. Mahmoud, Magdy A. Bayoumi: A 10-transistor low-power high-speed full adder cell. ISCAS (1) 1999: 43-46 |
38 | EE | Ashok Kumar, Magdy A. Bayoumi, Raghava V. Cherabuddi: Minimizing switchings of the function units through binding for low power. ISCAS (1) 1999: 66-69 |
37 | EE | M. B. Maaz, Magdy A. Bayoumi: A non-zero clock skew scheduling algorithm for high speed clock distribution network. ISCAS (6) 1999: 382-385 |
36 | EE | M. Mazen Al-Khatib, Magdy Bayoumi: Performance Analysis for a New Automatic Error Control System for Overcoming Turbulent Fading Errors for Wireless ATM Networks. ISCC 1999: 310-316 |
1998 | ||
35 | EE | Ahmed M. Shams, Magdy A. Bayoumi: A New Full Adder Cell for Low-Power Applications. Great Lakes Symposium on VLSI 1998: 45- |
34 | EE | M. K. Kidambi, Akhilesh Tyagi, Mohammed R. Madani, Magdy A. Bayoumi: Three-dimensional defect sensitivity modeling for open circuits in ULSI structures. IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 366-371 (1998) |
33 | EE | Jimmy C. Limqueco, Magdy A. Bayoumi: A Vlsi Architecture for Separable 2-D Discrete Wavelet Transform. VLSI Signal Processing 18(2): 125-140 (1998) |
1997 | ||
32 | EE | Michael Weeks, M. B. Maaz, H. Krishnamurthy, Paul Shipley, Magdy A. Bayoumi: A prototype chipset for a large scaleable ATM switching node. Great Lakes Symposium on VLSI 1997: 131-136 |
31 | EE | Raghava V. Cherabuddi, Magdy A. Bayoumi, H. Krishnamurthy: A low power based system partitioning and binding technique for multi-chip module architectures. Great Lakes Symposium on VLSI 1997: 156-162 |
30 | EE | K. R. Rao, Magdy A. Bayoumi, T. V. Subramaniam: T1: Multimedia. VLSI Design 1997: 2- |
29 | EE | Rafic A. Ayoubi, Magdy A. Bayoumi, A. Elchouemi, Bassem A. Alhalabi: An Efficient Mapping Algorithm of Multilayer Perceptron on Mesh-connected Architectures. Parallel Algorithms Appl. 11(3-4): 273-285 (1997) |
1996 | ||
28 | EE | Paul Shipley, Sherif Sayed, Magdy A. Bayoumi: A High Speed VLSI Architecture for Scaleable ATM Switches. Great Lakes Symposium on VLSI 1996: 72-76 |
27 | EE | Raghava V. Cherabuddi, Jijun Chen, Magdy A. Bayoumi: A Graph-Based Approach to the Synthesis of Multi-Chip Module Architectures. VLSI Design 1996: 192-197 |
26 | Qutaibah M. Malluhi, Magdy A. Bayoumi, T. R. N. Rao: Correction to "Efficient Mapping of ANNs on Hypercube Massively Parallel Machines". IEEE Trans. Computers 45(4): 511 (1996) | |
25 | Rafic A. Ayoubi, Qutaibah M. Malluhi, Magdy A. Bayoumi: The Extended Cube Connected Cycles: An Efficient Interconnection for Massively Parallel Systems. IEEE Trans. Computers 45(5): 609-614 (1996) | |
1995 | ||
24 | EE | A. Agrawal, A. Raju, S. Varadarajan, Magdy A. Bayoumi: A scalable shared buffer ATM switch architecture. Great Lakes Symposium on VLSI 1995: 256-261 |
23 | EE | Bassem A. Alhalabi, Magdy A. Bayoumi: A scalable analog architecture for neural networks with on-chip learning and refreshing. Great Lakes Symposium on VLSI 1995: 33- |
22 | EE | A. Agrawal, Magdy A. Bayoumi, A. Elchouemi: A new ATM congestion control scheme for shared buffer switch architectures. ICCCN 1995: 604 |
21 | Majid M. Altowairjri, Magdy A. Bayoumi: A New Thinning Algorithm for Arabic Character Using Self-Organizing Neural Network. ISCAS 1995: 1824-1827 | |
20 | Qutaibah M. Malluhi, Magdy A. Bayoumi, T. R. N. Rao: Efficient Mapping of ANNs on Hypercube Massively Parallel Machines. IEEE Trans. Computers 44(6): 769-779 (1995) | |
19 | EE | Magdy A. Bayoumi: Introduction. VLSI Signal Processing 11(1-2): 5-6 (1995) |
18 | EE | Qutaibah M. Malluhi, Magdy A. Bayoumi, T. R. N. Rao: Tree-based special-purpose Array architectures for neural computing. VLSI Signal Processing 11(3): 245-262 (1995) |
1994 | ||
17 | N. A. Ramakrishna, Magdy A. Bayoumi: Storage Allocation Strategies for Data Path Synthesis of ACICs. ISCAS 1994: 41-44 | |
16 | Majid M. Altuwaijri, Magdy A. Bayoumi: Arabic Text Recognition Using Neural Networks. ISCAS 1994: 415-418 | |
15 | M. K. Kidambi, Akhilesh Tyagi, Mohammed R. Madani, Magdy A. Bayoumi: Parameterized Modeling of Open-Circuit Critical Volume for Three-Dimensional Defects in VLSI Processing. VLSI Design 1994: 333-338 | |
14 | EE | Qutaibah M. Malluhi, Magdy A. Bayoumi: The Hierarchical Hypercube: A New Interconnection Topology for Massively Parallel Systems. IEEE Trans. Parallel Distrib. Syst. 5(1): 17-30 (1994) |
13 | EE | Rafic A. Ayoubi, Magdy A. Bayoumi: Bitonic Sort on the Connection Machine. Parallel Algorithms Appl. 3(1-2): 151-161 (1994) |
1993 | ||
12 | Qutaibah M. Malluhi, Magdy A. Bayoumi, T. R. N. Rao: On the Hierarchical Hypercube Interconnection Network. IPPS 1993: 524-530 | |
11 | H. Kumar, Magdy A. Bayoumi, Akhilesh Tyagi, Nam Ling, R. Kalyan: Parallel Implementation of a Cut and Paste Maze Routing Algorithm. ISCAS 1993: 2035-2038 | |
10 | Qutaibah M. Malluhi, Magdy A. Bayoumi, T. R. N. Rao: An Efficient Mapping of Multilayer Perceptron with Backpropagation ANNs on Hypercubes. SPDP 1993: 368-375 | |
1992 | ||
9 | Qutaibah M. Malluhi, Magdy A. Bayoumi: Properties and Performance of the Hierarchical Hypercube. IPPS 1992: 47-50 | |
8 | EE | Magdy A. Bayoumi, Padma Rao, Bassem A. Alhalabi: VLSI parallel architecture for Kalman filterAn algorithm specific approach. VLSI Signal Processing 4(2-3): 147-163 (1992) |
1991 | ||
7 | Khaled M. Elleithy, Magdy A. Bayoumi: From Algorithms to Parallel Architectures: A Formal Approach. IPPS 1991: 358-363 | |
6 | Chenyi Hu, Magdy A. Bayoumi, R. Baker Kearfott, Qing Yang: A Parallelized Algorithm for the All-Row Preconditioned Interval Newton/Generalized Bisection Method. PPSC 1991: 205-209 | |
1990 | ||
5 | EE | Khaled M. Elleithy, Magdy A. Bayoumi: A Framework for High Level Synthesis of Digital Architectures from U-Recursive Algorithms. ACM Conference on Computer Science 1990: 305-311 |
4 | Khaled M. Elleithy, Magdy A. Bayoumi: Formal Synthesis of a Parallel Architectures from Recursive Equations. ICPP (1) 1990: 145-148 | |
3 | EE | Nam Ling, Magdy A. Bayoumi: Systolic temporal arithmetic: a new formalism for specification and verification of systolic arrays. IEEE Trans. on CAD of Integrated Circuits and Systems 9(8): 804-820 (1990) |
1989 | ||
2 | Nam Ling, Magdy A. Bayoumi: Systematic Algorithm Mapping for Multidimensional Systolic Arrays. J. Parallel Distrib. Comput. 7(2): 368-382 (1989) | |
1988 | ||
1 | Nam Ling, Magdy A. Bayoumi: Algorithms for High Speed Multi-Dimensional Arithmetic and DSP Systolic Arrays. ICPP (1) 1988: 367-374 |