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S. Nandi

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2007
14EER. Carretero-González, Panayotis G. Kevrekidis, D. J. Frantzeskakis, Boris A. Malomed, S. Nandi, A. R. Bishop: Soliton trains and vortex streets as a form of Cerenkov radiation in trapped Bose-Einstein condensates. Mathematics and Computers in Simulation 74(4-5): 361-369 (2007)
2005
13EEB. Paul, S. V. Rao, S. Nandi: An Efficient Distributed Algorithm for Finding Virtual Backbones in Wireless Ad-Hoc Networks. HiPC 2005: 302-311
12EER. Mukherjee, S. Nandi, S. Banerjee: Reduction in spectral peaks of DC-DC converters using chaos-modulated clock. ISCAS (4) 2005: 3367-3370
1999
11 N. Sudha, S. Nandi, K. Sridharan: A Parallel Algorithm to Construct Voronoi Diagram and Its VLSI Architecture. ICRA 1999: 1683-1688
10EES. Nandi, Ch. Rambabu, Parimal Pal Chaudhuri: A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder. ISPAN 1999: 158-167
1997
9EED. K. Bhattacharryya, S. Nandi: An efficient class of SEC-DED-AUED codes. ISPAN 1997: 410-416
8 S. Nandi, Parimal Pal Chaudhuri: Reply to Comments on "Theory and Application of Cellular Automata in Cryptography". IEEE Trans. Computers 46(5): 639 (1997)
1996
7EES. Mitra, S. Das, Parimal Pal Chaudhuri, S. Nandi: Architecture of a VLSI Chip for Modeling Amino Acid Sequence in Proteins. VLSI Design 1996: 316-317
6EES. Nandi, Santanu Chattopadhyay, Parimal Pal Chaudhuri: Programmable cellular automata based testbed for fault diagnosis in VLSI circuits. VLSI Design 1996: 61-64
5 S. Nandi, Parimal Pal Chaudhuri: Analysis of Periodic and Intermediate Boundary 90/150 Cellular Automata. IEEE Trans. Computers 45(1): 1-12 (1996)
1995
4EES. Nandi, Parimal Pal Chaudhuri: Theory and applications of cellular automata for synthesis of easily testable combinational logic. Asian Test Symposium 1995: 146-152
1994
3 S. Nandi, Vamsi Boppana, Parimal Pal Chaudhuri: A CAD Tool for Design of On-Chip Store & Generate Scheme. VLSI Design 1994: 169-174
2 S. Nandi, B. K. Kar, Parimal Pal Chaudhuri: Theory and Applications of Cellular Automata in Cryptography. IEEE Trans. Computers 43(12): 1346-1357 (1994)
1993
1 S. Nandi, Vamsi Boppana, Supratik Chakraborty, Parimal Pal Chaudhuri, Samir Roy: Delay Fault Test Generation with Cellular Automata. VLSI Design 1993: 281-286

Coauthor Index

1S. Banerjee [12]
2D. K. Bhattacharryya [9]
3A. R. Bishop [14]
4Vamsi Boppana [1] [3]
5R. Carretero-González [14]
6Supratik Chakraborty [1]
7Santanu Chattopadhyay [6]
8Parimal Pal Chaudhuri [1] [2] [3] [4] [5] [6] [7] [8] [10]
9S. Das [7]
10D. J. Frantzeskakis [14]
11B. K. Kar [2]
12Panayotis G. Kevrekidis [14]
13Boris A. Malomed [14]
14S. Mitra [7]
15R. Mukherjee [12]
16B. Paul [13]
17Ch. Rambabu [10]
18S. V. Rao [13]
19Samir Roy [1]
20K. Sridharan [11]
21N. Sudha [11]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)