S. Nandi

2007
14	EE	R. Carretero-González, Panayotis G. Kevrekidis, D. J. Frantzeskakis, Boris A. Malomed, S. Nandi, A. R. Bishop: Soliton trains and vortex streets as a form of Cerenkov radiation in trapped Bose-Einstein condensates. Mathematics and Computers in Simulation 74(4-5): 361-369 (2007)
2005
13	EE	B. Paul, S. V. Rao, S. Nandi: An Efficient Distributed Algorithm for Finding Virtual Backbones in Wireless Ad-Hoc Networks. HiPC 2005: 302-311
12	EE	R. Mukherjee, S. Nandi, S. Banerjee: Reduction in spectral peaks of DC-DC converters using chaos-modulated clock. ISCAS (4) 2005: 3367-3370
1999
11		N. Sudha, S. Nandi, K. Sridharan: A Parallel Algorithm to Construct Voronoi Diagram and Its VLSI Architecture. ICRA 1999: 1683-1688
10	EE	S. Nandi, Ch. Rambabu, Parimal Pal Chaudhuri: A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder. ISPAN 1999: 158-167
1997
9	EE	D. K. Bhattacharryya, S. Nandi: An efficient class of SEC-DED-AUED codes. ISPAN 1997: 410-416
8		S. Nandi, Parimal Pal Chaudhuri: Reply to Comments on "Theory and Application of Cellular Automata in Cryptography". IEEE Trans. Computers 46(5): 639 (1997)
1996
7	EE	S. Mitra, S. Das, Parimal Pal Chaudhuri, S. Nandi: Architecture of a VLSI Chip for Modeling Amino Acid Sequence in Proteins. VLSI Design 1996: 316-317
6	EE	S. Nandi, Santanu Chattopadhyay, Parimal Pal Chaudhuri: Programmable cellular automata based testbed for fault diagnosis in VLSI circuits. VLSI Design 1996: 61-64
5		S. Nandi, Parimal Pal Chaudhuri: Analysis of Periodic and Intermediate Boundary 90/150 Cellular Automata. IEEE Trans. Computers 45(1): 1-12 (1996)
1995
4	EE	S. Nandi, Parimal Pal Chaudhuri: Theory and applications of cellular automata for synthesis of easily testable combinational logic. Asian Test Symposium 1995: 146-152
1994
3		S. Nandi, Vamsi Boppana, Parimal Pal Chaudhuri: A CAD Tool for Design of On-Chip Store & Generate Scheme. VLSI Design 1994: 169-174
2		S. Nandi, B. K. Kar, Parimal Pal Chaudhuri: Theory and Applications of Cellular Automata in Cryptography. IEEE Trans. Computers 43(12): 1346-1357 (1994)
1993
1		S. Nandi, Vamsi Boppana, Supratik Chakraborty, Parimal Pal Chaudhuri, Samir Roy: Delay Fault Test Generation with Cellular Automata. VLSI Design 1993: 281-286

Coauthor Index

1	S. Banerjee	[12]
2	D. K. Bhattacharryya	[9]
3	A. R. Bishop	[14]
4	Vamsi Boppana	[1] [3]
5	R. Carretero-González	[14]
6	Supratik Chakraborty	[1]
7	Santanu Chattopadhyay	[6]
8	Parimal Pal Chaudhuri	[1] [2] [3] [4] [5] [6] [7] [8] [10]
9	S. Das	[7]
10	D. J. Frantzeskakis	[14]
11	B. K. Kar	[2]
12	Panayotis G. Kevrekidis	[14]
13	Boris A. Malomed	[14]
14	S. Mitra	[7]
15	R. Mukherjee	[12]
16	B. Paul	[13]
17	Ch. Rambabu	[10]
18	S. V. Rao	[13]
19	Samir Roy	[1]
20	K. Sridharan	[11]
21	N. Sudha	[11]

Colors in the list of coauthors