| 2008 |
| 43 | EE | HyunChul Joh,
Yashwant K. Malaiya:
Seasonality in Vulnerability Discovery in Major Software Systems.
ISSRE 2008: 297-298 |
| 42 | EE | HyunChul Joh,
Jinyoo Kim,
Yashwant K. Malaiya:
Vulnerability Discovery Modeling Using Weibull Distribution.
ISSRE 2008: 299-300 |
| 41 | EE | Omar H. Alhazmi,
Yashwant K. Malaiya:
Application of Vulnerability Discovery Models to Major Operating Systems.
IEEE Transactions on Reliability 57(1): 14-22 (2008) |
| 2007 |
| 40 | EE | Jinyoo Kim,
Yashwant K. Malaiya,
Indrakshi Ray:
Vulnerability Discovery in Multi-Version Software Systems.
HASE 2007: 141-148 |
| 39 | EE | Omar H. Alhazmi,
Yashwant K. Malaiya,
Indrajit Ray:
Measuring, analyzing and predicting security vulnerabilities in software systems.
Computers & Security 26(3): 219-228 (2007) |
| 2006 |
| 38 | | Omar H. Alhazmi,
Sung-Whan Woo,
Yashwant K. Malaiya:
Security vulnerability categories in major software systems.
Communication, Network, and Information Security 2006: 138-143 |
| 37 | EE | Sung-Whan Woo,
Omar H. Alhazmi,
Yashwant K. Malaiya:
Assessing Vulnerabilities in Apache and IIS HTTP Servers.
DASC 2006: 103-110 |
| 36 | EE | Omar H. Alhazmi,
Yashwant K. Malaiya:
Measuring and Enhancing Prediction Capabilities of Vulnerability Discovery Models for Apache and IIS HTTP Servers.
ISSRE 2006: 343-352 |
| 35 | EE | Ashutosh Sharma,
Anura P. Jayasumana,
Yashwant K. Malaiya:
X-IDDQ: A Novel Defect Detection Technique Using IDDQ Data.
VTS 2006: 180-185 |
| 2005 |
| 34 | EE | Artem Sokolov,
Alodeep Sanyal,
L. Darrell Whitley,
Yashwant K. Malaiya:
Dynamic power minimization during combinational circuit testing as a traveling salesman problem.
Congress on Evolutionary Computation 2005: 1088-1095 |
| 33 | EE | Omar H. Alhazmi,
Yashwant K. Malaiya,
Indrajit Ray:
Security Vulnerabilities in Software Systems: A Quantitative Perspective.
DBSec 2005: 281-294 |
| 32 | EE | Omar H. Alhazmi,
Yashwant K. Malaiya:
Modeling the Vulnerability Discovery Process.
ISSRE 2005: 129-138 |
| 2004 |
| 31 | | Jiao Chen,
Yashwant K. Malaiya:
Augmenting Test Case Generation Using Statechart.
Software Engineering Research and Practice 2004: 608-614 |
| 2000 |
| 30 | EE | Yashwant K. Malaiya,
Jason Denton:
Module Size Distribution and Defect Density.
ISSRE 2000: 62-71 |
| 1998 |
| 29 | EE | Yashwant K. Malaiya,
Jason Denton:
Estimating the Number of Residual Defects.
HASE 1998: 98- |
| 1997 |
| 28 | EE | Sankaran M. Menon,
Yashwant K. Malaiya,
Anura P. Jayasumana:
Input Pattern Classification for Detection of Stuck-ON and Bridging Faults Using I/sub DDQ/ Testing in BiCMOS and CMOS Circuits.
VLSI Design 1997: 545-546 |
| 1996 |
| 27 | EE | Sankaran M. Menon,
Anura P. Jayasumana,
Yashwant K. Malaiya:
Input Pattern Classification for Transistor Level Testing of Bridging Faults in BiCMOS Circuits.
Great Lakes Symposium on VLSI 1996: 214-219 |
| 1995 |
| 26 | | Anura P. Jayasumana,
Yashwant K. Malaiya,
Sankaran M. Menon:
A Novel High-Speed BiCMOS Domino Logic Family.
ISCAS 1995: 21-24 |
| 25 | EE | Ramanagopal V. Vogety,
Yashwant K. Malaiya,
Anura P. Jayasumana:
Interconnection of FDDI-II networks through an ATM backbone - An analysis.
LCN 1995: 150- |
| 1994 |
| 24 | | Sankaran M. Menon,
Yashwant K. Malaiya,
Anura P. Jayasumana,
Carol Q. Tong:
The Effect of Built-In Current Sensors (BICS) on Operational and Test Performance.
VLSI Design 1994: 187-190 |
| 1993 |
| 23 | | Sankaran M. Menon,
Anura P. Jayasumana,
Yashwant K. Malaiya:
Test Generation for BiCMOS Circuits.
ISCAS 1993: 1987-1990 |
| 22 | | W. K. Al-Assadi,
Yashwant K. Malaiya,
Anura P. Jayasumana:
Use of Storage Elements as Primitives for Modelling Faults in Synchronous Sequential Circuits.
VLSI Design 1993: 118-123 |
| 21 | EE | Yashwant K. Malaiya,
Anneliese von Mayrhauser,
Pradip K. Srimani:
An Examination of Fault Exposure Ratio.
IEEE Trans. Software Eng. 19(11): 1087-1094 (1993) |
| 20 | EE | W. K. Al-Assadi,
Yashwant K. Malaiya,
Anura P. Jayasumana:
Faulty behavior of storage elements and its effects on sequential circuits.
IEEE Trans. VLSI Syst. 1(4): 446-452 (1993) |
| 1992 |
| 19 | | Yashwant K. Malaiya:
Guest Editor's Introduction: VLSI Design 92.
IEEE Design & Test of Computers 9(4): 4-5 (1992) |
| 18 | | Pradip K. Srimani,
Yashwant K. Malaiya:
Steps to Practical Reliability Meassurement - Guest Editors' Introduction.
IEEE Software 9(4): 10-12 (1992) |
| 17 | | Nachimuthu Karunanithi,
Darrell Whitley,
Yashwant K. Malaiya:
Using Neural Networks in Reliability Prediction.
IEEE Software 9(4): 53-59 (1992) |
| 16 | EE | Nachimuthu Karunanithi,
Darrell Whitley,
Yashwant K. Malaiya:
Prediction of Software Reliability Using Connectionist Models.
IEEE Trans. Software Eng. 18(7): 563-574 (1992) |
| 1991 |
| 15 | | Yashwant K. Malaiya,
Pradip K. Srimani:
An Introduction to Software Reliability Models.
Int. CMG Conference 1991: 1237-1239 |
| 14 | | Yinghua Min,
Yashwant K. Malaiya,
Boping Jin:
Analysis of Detection Capability of Parallel Signature Analyzers.
IEEE Trans. Computers 40(9): 1075-1081 (1991) |
| 1990 |
| 13 | EE | S. Hwang,
Rochit Rajsuman,
Yashwant K. Malaiya:
On the testing of microprogrammed processor.
MICRO 1990: 260-266 |
| 1989 |
| 12 | EE | Rochit Rajsuman,
Anura P. Jayasumana,
Yashwant K. Malaiya:
CMOS Stuck-open Fault Detection Using Single Test Patterns.
DAC 1989: 714-717 |
| 11 | EE | Yashwant K. Malaiya:
On inherent untestability of unaugmented microprogrammed control.
MICRO 1989: 88-96 |
| 10 | EE | Rochit Rajsuman,
Yashwant K. Malaiya,
Anura P. Jayasumana:
Limitations of switch level analysis for bridging faults.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(7): 807-811 (1989) |
| 1988 |
| 9 | EE | Yashwant K. Malaiya,
S. Feng:
Design of a testable RISC-to-CISC control architecture.
MICRO 1988: 57-59 |
| 1987 |
| 8 | EE | Rochit Rajsuman,
Yashwant K. Malaiya,
Anura P. Jayasumana:
On Accuracy of Switch-Level Modeling of Bridging Faults in Complex Gates.
DAC 1987: 244-250 |
| 1985 |
| 7 | | Yashwant K. Malaiya:
Faults in Microprogrammed and Hardwired Control.
ITC 1985: 732 |
| 1984 |
| 6 | | Yashwant K. Malaiya,
Shoubao Yang:
The Coverage Problem for Random Testing.
ITC 1984: 237-245 |
| 1983 |
| 5 | | Yashwant K. Malaiya,
Ramesh Narayanaswamy:
Testing for Timing Faults in Synchronous Sequential Integrated Circuits.
ITC 1983: 560-573 |
| 1981 |
| 4 | | Chi-Chang Liaw,
Stephen Y. H. Su,
Yashwant K. Malaiya:
State Diagram Approach for Functional Testing of Control Section.
ITC 1981: 433-446 |
| 3 | | Chi-Chang Liaw,
Stephen Y. H. Su,
Yashwant K. Malaiya:
Test-Experiments for Detection and Location of Intermittent Faults in Sequential Circuits.
IEEE Trans. Computers 30(12): 989-995 (1981) |
| 2 | | Yashwant K. Malaiya,
Stephen Y. H. Su:
Reliability Measure of Hardware Redundancy Fault-Tolerant Digital Systems with Intermittent Faults.
IEEE Trans. Computers 30(8): 600-604 (1981) |
| 1978 |
| 1 | | Stephen Y. H. Su,
Israel Koren,
Yashwant K. Malaiya:
A Continous-Parameter Markov Model and Detection Procedures for Intermittent Faults.
IEEE Trans. Computers 27(6): 567-570 (1978) |