| 2007 |
| 39 | EE | Kun Xie,
Yinghua Min,
Dafang Zhang,
Jigang Wen,
Gaogang Xie:
A Scalable Bloom Filter for Membership Queries.
GLOBECOM 2007: 543-547 |
| 38 | EE | Gaogang Xie,
Guangxing Zhang,
Jianhua Yang,
Yinghua Min,
Valérie Issarny,
Alberto Conte:
Survey on Traffic of Metro Area Network with Measurement On-Line.
International Teletraffic Congress 2007: 666-677 |
| 2005 |
| 37 | EE | Yuan-sheng Luo,
Dafang Zhang,
Yinghua Min:
An Improved Scheme of Index-Based Checkpointing.
PRDC 2005: 167-174 |
| 36 | EE | Jie Wu,
Feng Gao,
Zhongcheng Li,
Yinghua Min:
Optimal, and reliable communication in hypercubes using extended safety vectors.
IEEE Transactions on Reliability 54(3): 402-411 (2005) |
| 2004 |
| 35 | | Debesh K. Das,
Hideo Fujiwara,
Yungang Li,
Yinghua Min,
Shiyi Xu,
Yervant Zorian:
Design & Test Education in Asia.
IEEE Design & Test of Computers 21(4): 331-338 (2004) |
| 2003 |
| 34 | EE | Yinghua Min,
Jishun Kuang,
Xiaoyan Niu:
At-Speed Current Testing.
Asian Test Symposium 2003: 396-399 |
| 33 | EE | Ruilian Zhao,
Michael R. Lyu,
Yinghua Min:
Domain Testing Based on Character String Predicate.
Asian Test Symposium 2003: 96-101 |
| 32 | EE | Ruilian Zhao,
Michael R. Lyu,
Yinghua Min:
A New Software Testing Approach Based on Domain Analysis of Specifications and Programs.
ISSRE 2003: 60-70 |
| 31 | EE | Jianhui Jiang,
Yinghua Min,
Chenglian Peng:
Fault-Tolerant Systems with Concurrent Error-Locating Capability.
J. Comput. Sci. Technol. 18(2): 190-200 (2003) |
| 30 | EE | Jishun Kuang,
Zhiqiang Yang,
Qijian Zhu,
Yinghua Min:
IDDT: Fundamentals and Test Generation.
J. Comput. Sci. Technol. 18(3): 299-307 (2003) |
| 29 | EE | Zhigang Yin,
Yinghua Min,
Xiaowei Li,
Huawei Li:
A Novel RT-Level Behavioral Description Based ATPG Method.
J. Comput. Sci. Technol. 18(3): 308-317 (2003) |
| 2002 |
| 28 | EE | Zuying Luo,
Xiaowei Li,
Huawei Li,
Shiyuan Yang,
Yinghua Min:
Test Power Optimization Techniques for CMOS Circuits.
Asian Test Symposium 2002: 332-337 |
| 27 | EE | Yinghua Min:
Why RTL ATPG?
J. Comput. Sci. Technol. 17(2): 113-117 (2002) |
| 2001 |
| 26 | EE | Huawei Li,
Yinghua Min,
Zhongcheng Li:
An RT-Level ATPG Based on Clustering of Circuit States.
Asian Test Symposium 2001: 213-218 |
| 25 | EE | Zhigang Yin,
Yinghua Min,
Xiaowei Li:
An Approach to RTL Fault Extraction and Test Generation.
Asian Test Symposium 2001: 219-224 |
| 24 | EE | Xiaowei Li,
Huawei Li,
Yinghua Min:
Reducing Power Dissipation during At-Speed Test Application.
DFT 2001: 116- |
| 23 | EE | Dafang Zhang,
Gaogang Xie,
Yinghua Min:
Node Grouping in System-Level Fault Diagnosis.
J. Comput. Sci. Technol. 16(5): 474-479 (2001) |
| 2000 |
| 22 | EE | Lijian Li,
Xiaoyang Yu,
Cheng-Wen Wu,
Yinghua Min:
A waveform simulator based on Boolean process.
Asian Test Symposium 2000: 145-150 |
| 21 | EE | Lijian Li,
Yinghua Min:
An efficient BIST design using LFSR-ROM architecture.
Asian Test Symposium 2000: 386- |
| 20 | EE | Jie Wu,
Feng Gao,
Zhongcheng Li,
Yinghua Min:
Optimal Fault-Tolerant Routing in Hypercubes Using Extended Safety Vectors.
ICPADS 2000: 264-271 |
| 19 | EE | Huawei Li,
Zhongcheng Li,
Yinghua Min:
Reduction of Number of Paths to be Tested in Delay Testing.
J. Electronic Testing 16(5): 477-485 (2000) |
| 1999 |
| 18 | EE | Jianhui Jiang,
Hongbao Shi,
Yinghua Min,
Xiaodong Zhao:
A Novel NMR Structure with Concurrent Error Location Capabilities.
PRDC 1999: 32-39 |
| 1998 |
| 17 | EE | Zhongcheng Li,
Yinghua Min,
Robert K. Brayton:
A New Low-Cost Method for Identifying Untestable Path Delay Faults.
Asian Test Symposium 1998: 76-81 |
| 16 | EE | Huawei Li,
Zhongcheng Li,
Yinghua Min:
Delay Testing with Double Observations.
Asian Test Symposium 1998: 96- |
| 15 | EE | Yinghua Min,
Zhongcheng Li:
IDDT Testing versus IDDQ Testing.
J. Electronic Testing 13(1): 51-55 (1998) |
| 1997 |
| 14 | EE | Wangning Long,
Shiyuan Yang,
Zhongcheng Li,
Yinghua Min:
Memory Efficient ATPG for Path Delay Faults.
Asian Test Symposium 1997: 326-331 |
| 13 | EE | Xiaoming Yu,
Yinghua Min:
Design of delay-verifiable combinational logic by adding extra inputs.
Asian Test Symposium 1997: 332- |
| 12 | EE | Yinghua Min,
Zhuxing Zhao,
Zhongcheng Li:
IDDT Testing.
Asian Test Symposium 1997: 378-383 |
| 11 | | Zhongcheng Li,
Yuhong Zhao,
Yinghua Min,
Robert K. Brayton:
Timed Binary Decision Diagrams.
ICCD 1997: 352-357 |
| 10 | | Zhongcheng Li,
Robert K. Brayton,
Yinghua Min:
Efficient Identification of Non-Robustly Untestable Path Delay Faults.
ITC 1997: 992-997 |
| 1996 |
| 9 | EE | Zhuxing Zhao,
Zhongcheng Li,
Yinghua Min:
Waveform Polynomial Manipulation Using Bdds.
Asian Test Symposium 1996: 136-141 |
| 8 | EE | Yinghua Min,
Zhuxing Zhao,
Zhongcheng Li:
An Analytical Delay Model Based on Boolean Process.
VLSI Design 1996: 162-165 |
| 7 | EE | Yingquan Zhou,
Mike W. T. Wong,
Yinghua Min:
Hardware reduction in continuous checksum-based analog checkers: Algorithm and its analysis.
J. Electronic Testing 9(1-2): 153-163 (1996) |
| 1995 |
| 6 | EE | Vishwani D. Agrawal,
Bernard Courtois,
Fumiyasu Hirose,
Sandip Kundu,
Chung-Len Lee,
Yinghua Min,
P. Pal Chaudhuri:
Panel: New Research Problems in the Emerging Test Technology.
Asian Test Symposium 1995: 189- |
| 5 | EE | Yinghua Min,
Zhuxing Zhao,
Zhongcheng Li:
Boolean process-an analytical approach to circuit representation (II).
Asian Test Symposium 1995: 26-32 |
| 4 | | Yingquan Zhou,
Mike W. T. Wong,
Yinghua Min:
Feasibility and Effectiveness of the Algorithm for Overhead Reduction in Analog Checkers.
FTCS 1995: 238-247 |
| 1994 |
| 3 | | Yinghua Min,
Yutang Zhou,
Zhongcheng Li,
Cheng Ye,
Yuqi Pan:
Behavioral Design and Prototyping of a Fail-Safe System.
VLSI Design 1994: 159-162 |
| 1991 |
| 2 | | Yinghua Min,
Yashwant K. Malaiya,
Boping Jin:
Analysis of Detection Capability of Parallel Signature Analyzers.
IEEE Trans. Computers 40(9): 1075-1081 (1991) |
| 1986 |
| 1 | | Yinghua Min,
Zhongcheng Li:
Pseudo-Exhaustive Testing Strategy for Large Combinational Circuits.
Comput. Syst. Sci. Eng. 1(4): 213-220 (1986) |