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Nacer-Eddine Zergainoh

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2007
20EEYoungchul Cho, Nacer-Eddine Zergainoh, Kiyoung Choi, Ahmed Amine Jerraya: Low Runtime-Overhead Software Synthesis for Communicating Concurrent Processes. IEEE International Workshop on Rapid System Prototyping 2007: 195-201
19EEYoussef Atat, Nacer-Eddine Zergainoh: Simulink-based MPSoC Design: New Approach to Bridge the Gap between Algorithm and Architecture Design. ISVLSI 2007: 9-14
18EEYoungchul Cho, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya, Kiyoung Choi: Buffer Size Reduction through Control-Flow Decomposition. RTCSA 2007: 183-190
2006
17EENacer-Eddine Zergainoh, Ludovic Tambour, Ahmed Amine Jerraya: Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation. IEEE Trans. VLSI Syst. 14(4): 349-360 (2006)
2005
16EEYoungchul Cho, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Scheduler implementation in MP SoC design. ASP-DAC 2005: 151-156
15EENacer-Eddine Zergainoh, Katalin Popovici, Ahmed Amine Jerraya, Pascal Urard: IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systems. ASP-DAC 2005: 612-618
14EENacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Amine Jerraya: Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip. IJES 1(1/2): 112-124 (2005)
13EENacer-Eddine Zergainoh, Ludovic Tambour, Henri Michel, Ahmed Amine Jerraya: Méthodes de correction de retard dans les modèles RTL des systèmes monopuces DSP obtenus par assemblage de composants IP : fondement théorique et implémentation. Technique et Science Informatiques 24(10): 1227-1257 (2005)
2003
12EEYoungchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh: Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. DATE 2003: 20132-20137
11EELudovic Tambour, Nacer-Eddine Zergainoh, Pascal Urard, Henri Michel, Ahmed Amine Jerraya: An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells. IEEE International Workshop on Rapid System Prototyping 2003: 56-63
2002
10EEAmer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. IEEE Trans. Software Eng. 28(9): 822-831 (2002)
9EEAmer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Exploration de l'espace des solutions architecturales dans le codesign. Technique et Science Informatiques 21(1): 9-35 (2002)
2001
8EEAmer Baghdadi, Damien Lyonnard, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: An efficient architecture model for systematic design of application-specific multiprocessor SoC. DATE 2001: 55-63
2000
7EESalvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz: Towards design and validation of mixed-technology SOCs. ACM Great Lakes Symposium on VLSI 2000: 29-33
6 Amer Baghdadi, Nacer-Eddine Zergainoh, Damien Lyonnard, Ahmed Amine Jerraya: Generic Architecture Platform for Multiprocessor System-On-Chip Design. DIPES 2000: 53-64
5 Nacer-Eddine Zergainoh, Amer Baghdadi, Ludovic Tambour, Damien Lyonnard, Lovic Gauthier, Ahmed Amine Jerraya: Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip. DIPES 2000: 99-110
4EEF. Hessel, Philippe Coste, Gabriela Nicolescu, P. LeMarrec, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Multi-Level Communication Synthesis of Heterogeneous Multilanguage Specification. ICCD 2000: 525-
3EEAmer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, T. Roudier, Ahmed Amine Jerraya: Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. IEEE International Workshop on Rapid System Prototyping 2000: 8-13
1999
2EEPhilippe Coste, F. Hessel, P. LeMarrec, Zoltan Sugar, M. Romdhani, Rodolph Suescun, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Multilanguage design of heterogeneous systems. CODES 1999: 54-58
1EEF. Hessel, Philippe Coste, P. LeMarrec, Nacer-Eddine Zergainoh, Jean-Marc Daveau, Ahmed Amine Jerraya: Communication Interface Synthesis for Multilanguage Specifications. IEEE International Workshop on Rapid System Prototyping 1999: 15-20

Coauthor Index

1Youssef Atat [19]
2Amer Baghdadi [3] [5] [6] [8] [9] [10] [14]
3Wander O. Cesário [3] [9] [10]
4Benoît Charlot [7]
5Youngchul Cho [12] [16] [18] [20]
6Kiyoung Choi [12] [16] [18] [20]
7Philippe Coste [1] [2] [4] [7]
8Bernard Courtois [7]
9Jean-Marc Daveau [1]
10Lovic Gauthier [5]
11F. Hessel [1] [2] [4]
12Ahmed Amine Jerraya [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [16] [17] [18] [20]
13P. LeMarrec [1] [2] [4]
14Ganghee Lee [12]
15Damien Lyonnard [5] [6] [8]
16Henri Michel [11] [13]
17Salvador Mir [7]
18Gabriela Nicolescu [4] [7]
19Fabien Parrain [7]
20Katalin Popovici [15]
21Márta Rencz [7]
22M. Romdhani [2]
23T. Roudier [3]
24Rodolph Suescun [2]
25Zoltan Sugar [2]
26Ludovic Tambour [5] [11] [13] [17]
27Pascal Urard [11] [15]
28Sungjoo Yoo [12] [16]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)