2007 |
5 | EE | Lothar Thiele,
Iuliana Bacivarov,
Wolfgang Haid,
Kai Huang:
Mapping Applications to Tiled Multiprocessor Embedded Systems.
ACSD 2007: 29-40 |
2006 |
4 | EE | Florin Dumitrascu,
Iuliana Bacivarov,
Lorenzo Pieralisi,
Marius Bonaciu,
Ahmed Amine Jerraya:
Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application.
DATE Designers' Forum 2006: 166-171 |
2005 |
3 | EE | Aimen Bouchhima,
Iuliana Bacivarov,
Wassim Youssef,
Marius Bonaciu,
Ahmed Amine Jerraya:
Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration.
ASP-DAC 2005: 969-972 |
2 | EE | Iuliana Bacivarov,
Aimen Bouchhima,
Sungjoo Yoo,
Ahmed Amine Jerraya:
ChronoSym: a new approach for fast and accurate SoC cosimulation.
IJES 1(1/2): 103-111 (2005) |
2003 |
1 | EE | Sungjoo Yoo,
Iuliana Bacivarov,
Aimen Bouchhima,
Yanick Paviot,
Ahmed Amine Jerraya:
Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer.
DATE 2003: 10550-10555 |