Ricardo A. L. Reis, Ricardo Reis
List of publications from the DBLP Bibliography Server - FAQ
2008 | ||
---|---|---|
74 | EE | Pasquale Delizia, Marcello De Matteis, Stefano D'Amico, Andrea Baschirotto, Carlos Azeredo Leme, Ricardo Reis: Design procedure for DVB-T receivers large tuning range LP filter. ISCAS 2008: 2913-2916 |
73 | EE | Gustavo Wilke, Ricardo Reis: A New Clock Mesh Buffer Sizing Methodology for Skew and Power Reduction. ISVLSI 2008: 227-232 |
72 | EE | Gustavo Wilke, Renan Fonseca, Cecilia Mezzomo, Ricardo Reis: A novel scheme to reduce short-circuit power in mesh-based clock architectures. SBCCI 2008: 117-122 |
2007 | ||
71 | Ricardo Augusto da Luz Reis, Adam Osseiran, Hans-Jörg Pfleiderer: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia Springer 2007 | |
70 | EE | Renato Fernandes Hentschke, Ricardo Reis: A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. ISCAS 2007: 2036-2039 |
69 | EE | Renato Fernandes Hentschke, Jaganathan Narasimham, Marcelo O. Johann, Ricardo Augusto da Luz Reis: Maze routing steiner trees with effective critical sink optimization. ISPD 2007: 135-142 |
68 | EE | José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Inserting Data Encoding Techniques into NoC-Based Systems. ISVLSI 2007: 299-304 |
67 | EE | Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis: 3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. ISVLSI 2007: 67-72 |
66 | EE | Lucas Brusamarello, Roberto da Silva, Ricardo A. L. Reis, Gilson I. Wirth: Yield Analysis by Error Propagation Using Numerical Derivatives Considering WD and D2D variations. ISVLSI 2007: 86-91 |
65 | EE | Guilherme Flach, Marcelo de Oliveira Johann, Renato Fernandes Hentschke, Ricardo Reis: Cell placement on graphics processing units. SBCCI 2007: 87-92 |
64 | EE | Lisane B. de Brisolara, Sang-Il Han, Xavier Guerin, Luigi Carro, Ricardo Reis, Soo-Ik Chae, Ahmed Amine Jerraya: Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. SCOPES 2007: 81-89 |
63 | EE | Cristiano Lazzari, Cristiano Santos, Adriel Ziesemer, Lorena Anghel, Ricardo Reis: Efficient timing closure with a transistor level design flow. VLSI-SoC 2007: 312-315 |
62 | EE | Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Gilson I. Wirth, Ralf Brederlow, Christian Pacha: Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. VLSI-SoC 2007: 78-83 |
61 | EE | Lucas Brusamarello, Roberto da Silva, Gilson I. Wirth, Ricardo A. L. Reis: Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level. VLSI-SoC 2007: 94-98 |
60 | EE | Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel: A Case Study on Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis. J. Electronic Testing 23(6): 625-633 (2007) |
2006 | ||
59 | EE | Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel: Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study. IOLTS 2006: 165-172 |
58 | EE | Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis: Design of a Robust 8-Bit Microprocessor to Soft Errors. IOLTS 2006: 195-196 |
57 | EE | Glauco Borges Valim dos Santos, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: Channel based routing in channel-less circuits. ISCAS 2006 |
56 | EE | Claudio Menezes, Cristina Meinhardt, Ricardo Reis, Reginaldo Tavares: A Regular Layout Approach for ASICs. ISVLSI 2006: 424-425 |
55 | EE | José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes: Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. ISVLSI 2006: 426-427 |
54 | EE | Daniel Lima Ferrão, Ricardo Reis, José Luís Almada Güntzel: Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical Functional Timing Analysis. PATMOS 2006: 301-310 |
53 | EE | José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. PATMOS 2006: 603-613 |
52 | EE | Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis: Design at high level of a robust 8-bit microprocessor to soft errors by using only standard gates. SBCCI 2006: 196-201 |
51 | EE | Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis: Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. SBCCI 2006: 220-225 |
50 | EE | Renato Fernandes Hentschke, Sandro Sawicki, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias. VLSI-SoC 2006: 128-133 |
2005 | ||
49 | EE | Lisane B. de Brisolara, Leandro Buss Becker, Luigi Carro, Flávio Rech Wagner, Carlos Eduardo Pereira, Ricardo Reis: Comparing high-level modeling approaches for embedded system design. ASP-DAC 2005: 986-989 |
48 | EE | Cristiano Lazzari, Lorena Anghel, Ricardo A. L. Reis: On Implementing a Soft Error Hardening Technique by Using an Automatic Layout Generator: Case Study. IOLTS 2005: 29-34 |
47 | EE | Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis: Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory. PATMOS 2005: 59-68 |
46 | EE | José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin: Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. SBCCI 2005: 196-201 |
45 | EE | César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis: Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. VLSI-SoC 2005: 179-194 |
44 | EE | Leonardo L. de Oliveira, Cristiano Santos, Daniel Lima Ferrão, Eduardo A. C. da Costa, José C. Monteiro, João Baptista dos Santos Martins, Sergio Bampi, Ricardo Augusto da Luz Reis: A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures. VLSI-SoC 2005: 25-39 |
43 | EE | Cristiano Lazzari, Lorena Anghel, Ricardo Reis: A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming. VLSI-SoC 2005: 331-344 |
42 | EE | Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis: An Automatic Technique for Optimizing Reed-Solomon Codes to Improve Fault Tolerance in Memories. IEEE Design & Test of Computers 22(1): 50-58 (2005) |
41 | Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis: Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM. RITA 12(1): 47-60 (2005) | |
2004 | ||
40 | Ricardo Reis: Information Technology, Selected Tutorials, IFIP 18th World Computer Congress, Tutorials, 22-27 August 2004, Toulouse, France Kluwer 2004 | |
39 | EE | Ricardo Reis, Fernanda Lima Kastensmidt, José Luís Almada Güntzel: Physical design methodologies for performance predictability and manufacturability. Conf. Computing Frontiers 2004: 390-397 |
38 | EE | Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis: Designing and testing fault-tolerant techniques for SRAM-based FPGAs. Conf. Computing Frontiers 2004: 419-432 |
37 | EE | Alex Panato, Sandro V. Silva, Flávio Rech Wagner, Marcelo O. Johann, Ricardo Reis, Sergio Bampi: Design of Very Deep Pipelined Multipliers for FPGAs. DATE 2004: 52-57 |
36 | Ricardo Reis: Requirements for Computer-Aided Learning from the Point of View of Electronic Design. EDUTECH 2004: 63-68 | |
35 | EE | Fabricio B. Bastian, Cristiano Lazzari, José Luís Almada Güntzel, Ricardo Reis: A New Transistor Folding Algorithm Applied to an Automatic Full-Custom Layout Generation Tool. PATMOS 2004: 732-741 |
34 | EE | Tudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Accurate capture of timing parameters in inductively-coupled on-chip interconnects. SBCCI 2004: 117-122 |
33 | Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis: Lookup-based Remote Laboratory for FPGA Digital Design Prototyping. VIRTUAL-LAB 2004: 3-11 | |
32 | EE | Fernanda Lima Kastensmidt, Gustavo Neuberger, Renato Fernandes Hentschke, Luigi Carro, Ricardo Reis: Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. IEEE Design & Test of Computers 21(6): 552-562 (2004) |
31 | Leandro Soares Indrusiak, Ricardo A. L. Reis, Manfred Glesner: Um Framework de Apoio à Colaboração no Projeto Distribuído de Sistemas Integrados. RITA 11(2): 49-74 (2004) | |
2003 | ||
30 | Lillian N. Cassel, Ricardo Augusto da Luz Reis: Informatics Curricula and Teaching Methods, IFIP TC3 / WG3.2 Conference on Informatics Curricula, Teaching Methods and Best Practics (ICTEM 2002), July 10-12, 2002, Florianópolis, SC, Brazil Kluwer 2003 | |
29 | Manfred Glesner, Ricardo Augusto da Luz Reis, Hans Eveking, Vincent John Mooney III, Leandro Soares Indrusiak, Peter Zipf: IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 Technische Universität Darmstadt, Insitute of Microelectronic Systems 2003 | |
28 | EE | Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis: Designing fault tolerant systems into SRAM-based FPGAs. DAC 2003: 650-655 |
27 | EE | Leandro Soares Indrusiak, Florian Lubitz, Ricardo Augusto da Luz Reis, Manfred Glesner: Ubiquitous Access to Reconfigurable Hardware: Application Scenarios and Implementation Issues. DATE 2003: 10940-10945 |
26 | EE | Alex Panato, Marcelo Barcelos, Ricardo Augusto da Luz Reis: A Low Device Occupation IP to Implement Rijndael Algorithm. DATE 2003: 20020-20025 |
25 | EE | Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis: Reducing pin and area overhead in fault-tolerant FPGA-based designs. FPGA 2003: 108-117 |
24 | EE | Renato Fernandes Hentschke, Ricardo Reis: Plic-Plac: a novel constructive algorithm for placement. ISCAS (5) 2003: 461-464 |
23 | EE | Alexandre Casacurta, Marcel Furtado Almeida, Ricardo Augusto da Luz Reis: A Visual Simulation Tool at Layout Level. MSE 2003: 110-111 |
22 | EE | Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, Giuliana Alcántara, Stefan Hoermann, Ralf Steinmetz: Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content. MSE 2003: 57-58 |
21 | EE | Ricardo Augusto da Luz Reis: Power and Timing Driven Physical Design Automation. PATMOS 2003: 348-357 |
20 | EE | Renato Fernandes Hentschke, Ricardo Augusto da Luz Reis: Improving Simulated Annealing Placement by Applying Random and Greedy Mixed Perturbations. SBCCI 2003: 267- |
19 | EE | Daniel Lima Ferrão, Gustavo Wilke, Ricardo Augusto da Luz Reis, José Luís Almada Güntzel: Improving Critical Path Identification in Functional Timing Analysis. SBCCI 2003: 297-302 |
18 | EE | Cristiano Santos, Gustavo Wilke, Cristiano Lazzari, Ricardo Reis, José Luís Almada Güntzel: A Transistor Sizing Method Applied to an Automatic Layout Generation Tool. SBCCI 2003: 303- |
17 | Cristiano Lazzari, Cristiano Viana Domingues, José Luís Almada Güntzel, Ricardo Augusto da Luz Reis: A New Macro-cell Generation Strategy for three metal layer CMOS Technologies. VLSI-SOC 2003: 193-197 | |
16 | Renato Fernandes Hentschke, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: A study on the performance of fast initial placement algorithms. VLSI-SOC 2003: 204- | |
15 | EE | Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Ricardo Augusto da Luz Reis: A multiple bit upset tolerant SRAM memory. ACM Trans. Design Autom. Electr. Syst. 8(4): 577-590 (2003) |
2002 | ||
14 | EE | Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis: Comparative Analysis and Application of Data Repository Infrastructure for Collaboration-Enabled Distributed Design Environments. DATE 2002: 1130 |
13 | EE | Fernanda Gusmão de Lima, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis: Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. IOLTW 2002: 194 |
12 | Lillian N. Cassel, Gordon Davies, Deepak Kumar, Ralf Denzer, A. E. N. Hacquebard, Richard J. LeBlanc, Luiz Ernesto Merkle, Fred Mulder, Zeljko Panian, Ricardo Augusto da Luz Reis, Eric Roberts, Paolo Rocchi, Maarten van Veen, Avelino F. Zorzo: Computing: The Shape of an Evolving Discipline. Informatics Curricula and Teaching Methods 2002: 131-138 | |
2001 | ||
11 | Leandro Soares Indrusiak, Jürgen Becker, Manfred Glesner, Ricardo Augusto da Luz Reis: Distributed Collaborative Design over Cave2 Framework. VLSI-SOC 2001: 97-108 | |
10 | EE | Leandro Soares Indrusiak, Ricardo Augusto da Luz Reis: 3D integrated circuit layout visualization using VRML. Future Generation Comp. Syst. 17(5): 503-511 (2001) |
9 | EE | Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis: Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electronic Testing 17(2): 149-161 (2001) |
8 | José Luís Almada Güntzel, Ricardo Augusto da Luz Reis: Análise de Timing Funcional de Circuitos VLSI Contendo Portas Complexas. RITA 8(1): 111-142 (2001) | |
2000 | ||
7 | L. Miguel Silveira, Srinivas Devadas, Ricardo Augusto da Luz Reis: VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal Kluwer 2000 | |
6 | EE | Marcelo O. Johann, Andrew E. Caldwell, Ricardo Augusto da Luz Reis, Andrew B. Kahng: Admissibility Proofs for the LCS* Algorithm. IBERAMIA-SBIA 2000: 236-244 |
5 | Júlio Pereira Machado, Carlos Tadeu Q. de Morais, Paulo Blauth Menezes, Ricardo Reis: Structuring Web course pages as Automata: revising concepts. RIAO 2000: 150-159 | |
4 | João Leonardo Fragoso, Eduardo Costa Pereira, Juergen Rochol, Sergio Bampi, Ricardo Reis: Specification and design of an Ethernet Interface soft IP. J. Braz. Comp. Soc. 6(3): 5-12 (2000) | |
1999 | ||
3 | EE | Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak: Microelectronics Education Using WWW. MSE 1999: 43-44 |
2 | EE | Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak: VRML and Microelectronics Education. MSE 1999: 84-85 |
1 | Fernanda Lima, Marcelo O. Johann, José Luís Almada Güntzel, Eduardo D'Avila, Luigi Carro, Ricardo Augusto da Luz Reis: Designing a Mask Programmable Matrix for Sequential Circuits. VLSI 1999: 439-446 |