CODES 1998: Seattle, Washington, USA

@proceedings{DBLP:conf/codes/1998,
  editor    = {Gaetano Borriello and
               Ahmed Amine Jerraya and
               Luciano Lavagno},
  title     = {Proceedings of the Sixth International Workshop on Hardware/Software
               Codesign, CODES 1998, Seattle, Washington, USA, March 15-18,
               1998},
  booktitle = {CODES},
  publisher = {IEEE Computer Society},
  year      = {1998},
  isbn      = {0-8186-8442-9},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

• Pai H. Chou, Gaetano Borriello:
  An analysis-based approach to composition of distributed embedded systems. 3-7
  Electronic Edition (ACM DL) BibTeX
• Dirk Ziegenbein, Rolf Ernst, Kai Richter, Jürgen Teich, Lothar Thiele:
  Combining multiple models of computation for scheduling and allocation. 9-13
  Electronic Edition (ACM DL) BibTeX
• Claudio Passerone, Roberto Passerone, Claudio Sansoè, Jonathan Martin, Alberto L. Sangiovanni-Vincentelli, Rick McGeer:
  Modeling reactive systems in Java. 15-19
  Electronic Edition (ACM DL) BibTeX
• Jörg Henkel, Yanbing Li:
  Energy-conscious HW/SW-partitioning of embedded systems: a case study on an MPEG-2 encoder. 23-27
  Electronic Edition (ACM DL) BibTeX
• Thomas Hollstein, Jürgen Becker, Andreas Kirschbaum, Manfred Glesner:
  HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems. 29-33
  Electronic Edition (ACM DL) BibTeX
• Franz Fischer, Annette Muth, Georg Färber:
  Towards interprocess communication and interface synthesis for a heterogeneous real-time rapid prototyping environment. 35-39
  Electronic Edition (ACM DL) BibTeX
• Michael Eisenring, Jürgen Teich:
  Domain-specific interface generation from dataflow specifications. 43-47
  Electronic Edition (ACM DL) BibTeX
• Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet:
  Communication synthesis and HW/SW integration for embedded system design. 49-53
  Electronic Edition (ACM DL) BibTeX
• Peter Voigt Knudsen, Jan Madsen:
  Communication estimation for hardware/software codesign. 55-59
  Electronic Edition (ACM DL) BibTeX
• Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-Vincentelli:
  Software timing analysis using HW/SW cosimulation and instruction set simulator. 65-69
  Electronic Edition (ACM DL) BibTeX
• Sungjoo Yoo, Kiyoung Choi:
  Optimistic distributed timed cosimulation based on thread simulation model. 71-75
  Electronic Edition (ACM DL) BibTeX
• Giuseppe Del Castillo, Wolfram Hardt:
  Fast dynamic analysis of complex HW/SW-systems based on abstract state machine models. 77-81
  Electronic Edition (ACM DL) BibTeX
• Luc Bianco, Michel Auguin, Guy Gogniat, Alain Pegatoquet:
  A path analysis based partitioning for time constrained embedded systems. 85-89
  Electronic Edition (ACM DL) BibTeX
• Frank Slomka, Jürgen Zant, Lennard Lambert:
  Schedulability analysis of heterogeneous systems for performance message sequence chart. 91-95
  Electronic Edition (ACM DL) BibTeX
• Robert P. Dick, David L. Rhodes, Wayne Wolf:
  TGFF: task graphs for free. 97-101
  Electronic Edition (ACM DL) BibTeX
• Josef Fleischmann, Klaus Buchenrieder, Rainer Kress:
  A hardware/software prototyping environment for dynamically reconfigurable embedded systems. 105-109
  Electronic Edition (ACM DL) BibTeX
• Jean-Marc Daveau, Gilberto Fernandes Marchioro, Ahmed Amine Jerraya:
  Hardware/software co-design of an ATM network interface card: a case study. 111-115
  Electronic Edition (ACM DL) BibTeX
• Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli:
  A case study on modeling shared memory access effects during performance analysis of HW/SW systems. 117-121
  Electronic Edition (ACM DL) BibTeX
• Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf:
  The construction of a retargetable simulator for an architecture template. 125-129
  Electronic Edition (ACM DL) BibTeX
• Jian Li, Rajesh K. Gupta:
  HDL code restructuring using timed decision tables. 131-135
  Electronic Edition (ACM DL) BibTeX
• Karam S. Chatha, Ranga Vemuri:
  RECOD: a retiming heuristic to optimize resource and memory utilization in HW/SW codesigns. 139-143
  Electronic Edition (ACM DL) BibTeX
• Peter Grun, Florin Balasa, Nikil D. Dutt:
  Memory size estimation for multimedia applications. 145-149
  Electronic Edition (ACM DL) BibTeX