15. RSP 2004:
Geneva,
Switzerland
15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland.
IEEE Computer Society 2004, ISBN 0-7695-2159-2 BibTeX
@proceedings{DBLP:conf/rsp/2004,
title = {15th IEEE International Workshop on Rapid System Prototyping
(RSP 2004), 28-30 June 2004, Geneva, Switzerland},
booktitle = {IEEE International Workshop on Rapid System Prototyping},
publisher = {IEEE Computer Society},
year = {2004},
isbn = {0-7695-2159-2},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Keynote Speech
Formal Specification and Verification
Co-Design Tools and Techniques
Poster Presentation
System Modeling and Architecture (I)
- Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesário, Ahmed Amine Jerraya:
An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor.
80-87
Electronic Edition (link) BibTeX
- Adriano Sarmento, Wander O. Cesário, Ahmed Amine Jerraya:
Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems.
88-95
Electronic Edition (link) BibTeX
- Rawat Siripokarpirom, Friedrich Mayer-Lindenberg:
Hardware-Assisted Simulation and Evaluation of IP Cores Using FPGA-Based Rapid Prototyping Boards.
96-102
Electronic Edition (link) BibTeX
- M. Diaby, Matthieu Tuna, Jean Lou Desbarbieux, Franck Wajsbürt:
High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication.
103-108
Electronic Edition (link) BibTeX
Keynote Speech
Methodologies and Tools
FPGA-Based Systems (I)
- André Meisel, Markus Visarius, Wolfram Hardt, Stefan Ihmor:
Self-Reconfiguration of Communication Interfaces.
144-150
Electronic Edition (link) BibTeX
- Daniel Denning, James Irvine, Derek Stark, Malachy Devlin:
Multi-User FPGA Co-Simulation over TCP/IP.
151-156
Electronic Edition (link) BibTeX
- Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber:
SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation.
157-163
Electronic Edition (link) BibTeX
- Kenneth B. Kent, Hejun Ma, Micaela Serra:
Rapid Prototyping of a Co-Designed Java Virtual Machine.
164-171
Electronic Edition (link) BibTeX
Case Studies
- Nikolaos Papandreou, Maria Varsamou, Theodore Antonakopoulos:
Transmission Systems Prototyping Based on Stateflow/Simulink Models.
174-179
Electronic Edition (link) BibTeX
- Apostolos Dollas, Kyprianos Papademetriou, Euripides Sotiriades, Dimitrios Theodoropoulos, Iosif Koidis, George Vernardos:
A Case Study on Rapid Prototyping of Hardware Systems: The Effect of CAD Tool Capabilities, Design Flows, and Design Styles.
180-186
Electronic Edition (link) BibTeX
- Ralf Ludewig, Thomas Hollstein, Falko Schütz, Manfred Glesner:
Rapid Prototyping of an Integrated Testing and Debugging Unit.
187-192
Electronic Edition (link) BibTeX
- Paolo Martinelli, Armin Wellig, Julien Zory:
Transaction-Level Prototyping of a UMTS Outer-Modem for System-on-Chip Validation and Architecture Exploration.
193-200
Electronic Edition (link) BibTeX
System Modeling and Architecture (II)
FPGA-Based Systems (II)
- Maryse Wouters, Peter Van Wesemael, Roeland Vandebriel, Andy Dewilde, Michael Libois:
Real Time Prototyping of Broadband Wireless LAN Systems.
226-231
Electronic Edition (link) BibTeX
- Moisès Serra, Pere Martí, Jordi Carrabina:
Implementation of a Channel Equalizer for OFDM Wireless LANs.
232-238
Electronic Edition (link) BibTeX
- Yann Thoma, Eduardo Sanchez, Daniel Roggen, Carl Hetherington, Juan Manuel Moreno:
Prototyping with a Bio-Inspired Reconfigurable Chip.
239-246
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:36:06 2009
by Michael Ley (ley@uni-trier.de)
