| 1998 |
|---|
| 10 | EE | Cordula Hansen,
Arno Kunzmann,
Wolfgang Rosenstiel:
Verification by Simulation Comparison using Interface Synthesis.
DATE 1998: 436- |
| 9 | EE | Karlheinz Weiß,
Ronny Kistner,
Arno Kunzmann,
Wolfgang Rosenstiel:
Analysis of the XC6000 Architecture for Embedded System Design.
FCCM 1998: 245- |
| 8 | EE | Karlheinz Weiß,
Ronny Kistner,
Arno Kunzmann,
Wolfgang Rosenstiel:
Advantages of the XC6000 Architecture for Embedded System Design (Abstract).
FPGA 1998: 255 |
| 1995 |
|---|
| 7 | EE | Jürgen Schubert,
Arno Kunzmann,
Wolfgang Rosenstiel:
Reduced design time by load distribution with CAD framework methodology information.
EURO-DAC 1995: 314-319 |
| 1994 |
|---|
| 6 | | Arno Kunzmann,
Frank Böhland:
Gate-Delay Fault Test with Conventional Scan-Design.
EDAC-ETC-EUROASIC 1994: 524-528 |
| 5 | EE | Arno Kunzmann:
Test pattern generation hardware motivated by pseudo-exhaustive test techniques.
EURO-DAC 1994: 240-245 |
| 4 | EE | Arno Kunzmann,
Frank Böhland:
Self-test of sequential circuits with deterministic test pattern sequences.
J. Electronic Testing 5(2-3): 307-312 (1994) |
| 1992 |
|---|
| 3 | | Arno Kunzmann:
FPL Based Self-Test with Deterministic Test Patterns.
FPL 1992: 174-182 |
| 1990 |
|---|
| 2 | EE | Arno Kunzmann,
Hans-Joachim Wunderlich:
An analytical approach to the partial scan problem.
J. Electronic Testing 1(2): 163-174 (1990) |
| 1988 |
|---|
| 1 | | Arno Kunzmann:
Produktionstest synchroner Schaltwerke auf der Basis von Pipelinestrukturen.
GI Jahrestagung (2) 1988: 92-105 |
