| 2005 |
|---|
| 8 | EE | Andrej Zemva,
Baldomir Zajc:
Test generation for technology-specific multi-faults based on detectable perturbations.
Microelectronics Reliability 45(1): 163-173 (2005) |
| 2001 |
|---|
| 7 | EE | Hubert Fröhlich,
Andrej Koir,
Baldomir Zajc:
Optimization of FPGA configurations using parallel genetic algorithm.
Inf. Sci. 133(3-4): 195-219 (2001) |
| 2000 |
|---|
| 6 | EE | Andrej Trost,
Andrej Zemva,
Baldomir Zajc:
Educational Programmable Hardware Prototyping and Verification System.
FPL 2000: 818-821 |
| 1998 |
|---|
| 5 | EE | Andrej Trost,
Andrej Zemva,
Baldomir Zajc:
Programmabel Prototyping System for Image Processing.
FPL 1998: 490-494 |
| 1996 |
|---|
| 4 | | Andrej Trost,
Roman Kuznar,
Andrej Zemva,
Baldomir Zajc:
An Experimental Programmable Environment for Prototyping Digital Circuits.
FPL 1996: 337-345 |
| 1994 |
|---|
| 3 | EE | Roman Kuznar,
Franc Brglez,
Baldomir Zajc:
Multi-way Netlist Partitioning into Heterogeneous FPGAs and Minimization of Total Device Cost and Interconnect.
DAC 1994: 238-243 |
| 2 | | Andrej Zemva,
Franc Brglez,
Krzysztof Kozminski,
Baldomir Zajc:
A Functionality Fault Model: Feasibility and Applications.
EDAC-ETC-EUROASIC 1994: 152-158 |
| 1 | EE | Roman Kuznar,
Baldomir Zajc,
Franc Brglez:
A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions.
EURO-DAC 1994: 271-276 |
