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Maurizio Valle

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2007
16EEAgustin Barberis, Leonardo Barboni, Maurizio Valle: Evaluating Energy Consumption in Wireless Sensor Networks Applications. DSD 2007: 455-462
2004
15EEEmanuele Bottino, Sergio Martinoia, Maurizio Valle: Integrated low noise signal conditioning interface for neuroengineering applications. ESANN 2004: 513-518
14EEMaurizio Valle, Francesco Diotalevi: A dedicated very low power analog VLSI architecture for smart adaptive systems. Appl. Soft Comput. 4(3): 206-226 (2004)
2002
13 Matteo Giudici, Filippo Queirolo, Maurizio Valle: Evaluation of gradient descent learning algorithms with adaptive and local learning rate for recognising hand-written numerals. ESANN 2002: 289-294
12EEMatteo Giudici, Filippo Queirolo, Maurizio Valle: Stochastic Supervised Learning Algorithms with Local and Adaptive Learning Rate for Recognising Hand-Written Characters. ICANN 2002: 619-624
2001
11EEFrancesco Diotalevi, Maurizio Valle: Weight perturbation learning algorithm with local learning rate adaptation for the classification of remote-sensing images. ESANN 2001: 217-222
10EEDavide Anguita, Maurizio Valle: Perspectives on dedicated hardware implementations. ESANN 2001: 45-56
2000
9EEFrancesco Diotalevi, Maurizio Valle, Daniele D. Caviglia: Evaluation of Gradient Descent Learning Algorithms with an Adaptive Local Rate Technique for Hierarchical Feed Forward Architectures. IJCNN (2) 2000: 185-190
8EEFrancesco Diotalevi, Maurizio Valle, Gian Marco Bo, Daniele D. Caviglia: A VLSI Architecture for Weight Perturbation on Chip Learning Implementation. IJCNN (4) 2000: 219-226
7EEGian Marco Bo, Daniele D. Caviglia, Maurizio Valle: An On-Chip Learning Neural Network. IJCNN (4) 2000: 66-74
1999
6 Francesco Diotalevi, Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle: Evaluation and Validation of Local and Adaptive Weight Perturbation Learning Algorithms for Optical Characters Recognition Applications. IIA/SOCO 1999
5 Daniela Baratta, Francesco Diotalevi, Maurizio Valle, Daniele D. Caviglia: Gradient Descent Learning Algorithm for Hierarchical Neural Networks: A Case Study in Industrial Quality. IWANN (2) 1999: 578-587
1997
4 Daniela Baratta, Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle, Giovanni Canepa, Riccardo Parenti, Carla Penno: A Hardware Implementation of Hierarchical Neural Networks for Real-Time Quality Contol Systems in Industrial Applications. ICANN 1997: 1229-1234
1996
3EEMaurizio Valle, Luigi Raffo, Daniele D. Caviglia, Giacomo M. Bisio: A VLSI Image Processing Architecture Dedicated to Real-Time Quality Control Analysis in an Industrial Plant. Real-Time Imaging 2(6): 361-371 (1996)
1994
2EEMaurizio Valle, Daniele D. Caviglia, Marco Cornero, Giovanni Nateri, Luciano Briozzo: A VHDL-based design methodology: the design experience of a high performance ASIC chip. EURO-DAC 1994: 664-669
1991
1 Daniele D. Caviglia, Maurizio Valle, Giacomo M. Bisio: A VLSI Module for Analog Adaptive Neural Architectures. VLSI 1991: 177-186

Coauthor Index

1Davide Anguita [10]
2Daniela Baratta [4] [5]
3Agustin Barberis [16]
4Leonardo Barboni [16]
5Giacomo M. Bisio [1] [3]
6Gian Marco Bo [4] [6] [7] [8]
7Emanuele Bottino [15]
8Luciano Briozzo [2]
9Giovanni Canepa [4]
10Daniele D. Caviglia [1] [2] [3] [4] [5] [6] [7] [8] [9]
11Marco Cornero [2]
12Francesco Diotalevi [5] [6] [8] [9] [11] [14]
13Matteo Giudici [12] [13]
14Sergio Martinoia [15]
15Giovanni Nateri [2]
16Riccardo Parenti [4]
17Carla Penno [4]
18Filippo Queirolo [12] [13]
19Luigi Raffo [3]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)