2008 |
41 | EE | Stanis Trendelenburg,
Joachim Becker,
Fabian Henrici,
Yiannos Manoli:
A GP algorithm for efficient synthesis of GM-C filters on a hexagonal FPAA structure.
GECCO 2008: 295-296 |
40 | EE | Joachim Becker,
Fabian Henrici,
Stanis Trendelenburg,
Yiannos Manoli:
A rapid prototyping environment for high-speed reconfigurable analog signal processing.
IPDPS 2008: 1-4 |
39 | EE | Matthias Keller,
Alexander Buhmann,
Maurits Ortmanns,
Yiannos Manoli:
Analysis of digital gain error compensation in continuous-time cascaded sigma-delta modulators.
ISCAS 2008: 1874-1877 |
38 | EE | Christian Peters,
Fabian Henrici,
Maurits Ortmanns,
Yiannos Manoli:
High-bandwidth floating gate CMOS rectifiers with reduced voltage drop.
ISCAS 2008: 2598-2601 |
37 | EE | Joachim Becker,
Fabian Henrici,
Stanis Trendelenburg,
Maurits Ortmanns,
Yiannos Manoli:
A hexagonal Field Programmable Analog Array consisting of 55 digitally tunable OTAs.
ISCAS 2008: 2897-2900 |
36 | EE | Niklas Lotze,
Maurits Ortmanns,
Yiannos Manoli:
Variability of flip-flop timing at sub-threshold voltages.
ISLPED 2008: 221-224 |
2007 |
35 | EE | Joachim Becker,
Stanis Trendelenburg,
Fabian Henrici,
Yiannos Manoli:
A field programmable Gm-C filter array (FPAA) for online adaptation to environmental changes.
AHS 2007: 547-553 |
34 | EE | Joachim Becker,
Stanis Trendelenburg,
Fabian Henrici,
Yiannos Manoli:
Synthesis of analog filters on an evolvable hardware platform using a genetic algorithm.
GECCO 2007: 190-197 |
33 | EE | Niklas Lotze,
Maurits Ortmanns,
Yiannos Manoli:
A Study on self-timed asynchronous subthreshold logic.
ICCD 2007: 533-540 |
32 | EE | Fabian Henrici,
Joachim Becker,
Alexander Buhmann,
Maurits Ortmanns,
Yiannos Manoli:
A Continuous-Time Field Programmable Analog Array Using Parasitic Capacitance Gm-C Filters.
ISCAS 2007: 2236-2239 |
31 | EE | Alexander Buhmann,
Matthias Keller,
Maurits Ortmanns,
Yiannos Manoli:
Estimating Circuit Nonidealities of Continuous-Time Multibit Delta-Sigma Modulators.
ISCAS 2007: 2264-2267 |
30 | EE | Matthias Keller,
Alexander Buhmann,
Maurits Ortmanns,
Yiannos Manoli:
A Method for the Discrete-Time Simulation of Continuous-Time Sigma-Delta Modulators.
ISCAS 2007: 241-244 |
29 | EE | Christian Peters,
O. Kessling,
Fabian Henrici,
Maurits Ortmanns,
Yiannos Manoli:
CMOS Integrated Highly Efficient Full Wave Rectifier.
ISCAS 2007: 2415-2418 |
28 | EE | Matthias Keller,
Alexander Buhmann,
Maurits Ortmanns,
Yiannos Manoli:
On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Noise-Shaping Sigma-Delta Modulators.
ISCAS 2007: 721-724 |
2006 |
27 | EE | Joachim Becker,
Yiannos Manoli:
Synthesis of Analog Filters on a Continuous-Time FPAA Using a Genetic Algorithm.
FPL 2006: 1-4 |
26 | EE | Lourans Samid,
Yiannos Manoli:
A multibit continuous time sigma delta modulator with successive-approximation quantizer.
ISCAS 2006 |
2005 |
25 | EE | S. Jayapal,
S. Ramachandran,
R. Bhutada,
Yiannos Manoli:
Optimization of Electronic Power Consumption in Wireless Sensor Nodes.
DSD 2005: 165-169 |
24 | EE | Friedel Gerfers,
Maurits Ortmanns,
Yiannos Manoli:
A new technique for automatic error correction in Sigma-Delta modulators.
ISCAS (3) 2005: 2539-2542 |
23 | EE | Friedel Gerfers,
Maurits Ortmanns,
Yiannos Manoli:
Increased jitter sensitivity in continuous- and discrete-time Sigma-Delta modulators due to finite opamp settling speed.
ISCAS (3) 2005: 2543-2546 |
22 | EE | Lourans Samid,
Yiannos Manoli:
A low power and low voltage continuous time /spl Sigma//spl Delta/ modulator.
ISCAS (4) 2005: 4066-4069 |
21 | EE | Joachim Becker,
Fabian Henrici,
Yiannos Manoli:
System-Level Analog Simulation of a Mixed-Signal Continuous-Time Field Programmable Analog Array.
IWSOC 2005: 434-438 |
2004 |
20 | EE | Ruimin Huang,
Yiannos Manoli:
Phased Array and Adaptive Antenna Transceivers in Wireless Sensor Networks.
DSD 2004: 587-592 |
19 | EE | Friedel Gerfers,
Maurits Ortmanns,
Yiannos Manoli:
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators.
ISCAS (1) 2004: 1076-1079 |
18 | EE | Joachim Becker,
Yiannos Manoli:
A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable G/sub M/-cells.
ISCAS (1) 2004: 1092-1095 |
17 | EE | Lourans Samid,
Patrick Volz,
Yiannos Manoli:
A dynamic analysis of a latched CMOS comparator.
ISCAS (1) 2004: 181-184 |
16 | | Matthias Keller,
Yiannos Manoli,
Friedel Gerfers:
A calibration method for current steering digital to analog converters in continuous time multi-bit sigma delta modulators.
ISCAS (1) 2004: 289-292 |
15 | EE | Maurits Ortmanns,
Markus Kuderer,
Yiannos Manoli,
Friedel Gerfers:
A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic range.
ISCAS (1) 2004: 405-408 |
2003 |
14 | EE | Maurits Ortmanns,
Friedel Gerfers,
Yiannos Manoli:
Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators.
ISCAS (1) 2003: 1037-1040 |
13 | EE | Friedel Gerfers,
Maurits Ortmanns,
Yiannos Manoli:
A 1 V, 12-bit wideband continuous-time /spl Sigma//spl Delta/ modulator for UMTS applications.
ISCAS (1) 2003: 921-924 |
12 | EE | Maurits Ortmanns,
Friedel Gerfers,
Yiannos Manoli:
Influence of finite integrator gain bandwidth on continuous-time sigma delta modulators.
ISCAS (1) 2003: 925-928 |
11 | EE | Yiannos Manoli:
Special section on the 2001 International Conference on Computer Design (ICCD).
IEEE Trans. VLSI Syst. 11(3): 301-302 (2003) |
2002 |
10 | EE | Lourans Samid,
Maurits Ortmanns,
Yiannos Manoli,
Friedel Gerfers:
A new kind of low-power multibit third order continuous-time lowpass Sigma-Delta modulator.
ISCAS (3) 2002: 293-296 |
9 | EE | Maurits Ortmanns,
Lourans Samid,
Yiannos Manoli,
Friedel Gerfers:
Multirate cascaded continuous time Sigma-Delta modulators.
ISCAS (4) 2002: 225-228 |
8 | EE | Friedel Gerfers,
Kian Min Soh,
Maurits Ortmanns,
Yiannos Manoli:
Figure of merit based design strategy for low-power continuous-time Sigma-Delta modulators.
ISCAS (4) 2002: 233-236 |
2001 |
7 | EE | Friedel Gerfers,
Yiannos Manoli:
A design strategy for low-voltage low-power continuous-time sigma-delta A/D converters.
DATE 2001: 361-369 |
6 | EE | Maurits Ortmanns,
Friedel Gerfers,
Yiannos Manoli:
On the synthesis of cascaded continuous-time Sigma-Delta modulators.
ISCAS (5) 2001: 419-422 |
2000 |
5 | EE | Rolf Hakenes,
Yiannos Manoli:
A Novel Low-Power Microprocessor Architecture.
ICCD 2000: 141-146 |
4 | EE | Friedel Gerfers,
Yiannos Manoli:
A 1.5V low-power third order continuous-time lowpass Sigma-Delta A/D converter (poster session).
ISLPED 2000: 219-221 |
1999 |
3 | EE | Rolf Hakenes,
Yiannos Manoli:
A Segmented Gray Code for Low-Power Microcontroller Address Buses.
EUROMICRO 1999: 1240-1243 |
2 | EE | Rolf Hakenes,
Yiannos Manoli:
Improving Microcontroller Power Consumption through a Segmented Gray Code Program Counter.
ICCD 1999: 277-278 |
1994 |
1 | EE | A. Both,
B. Biermann,
R. Lerch,
Yiannos Manoli,
K. Sievert:
Hardware-software-codesign of application specific microcontrollers with the ASM environment.
EURO-DAC 1994: 72-76 |