| 2001 |
|---|
| 10 | EE | Smita Bakshi,
Daniel Gajski:
Performance-constrained hierarchical pipelining for behaviors, loops, and operations.
ACM Trans. Design Autom. Electr. Syst. 6(1): 1-25 (2001) |
| 1999 |
|---|
| 9 | EE | Nithya Raghavan,
Venkatesh Akella,
Smita Bakshi:
Automatic Insertion of Gated Clocks at Register Transfer Level.
VLSI Design 1999: 48-54 |
| 8 | EE | Smita Bakshi,
Daniel D. Gajski:
Partitioning and pipelining for performance-constrained hardware/software systems.
IEEE Trans. VLSI Syst. 7(4): 419-432 (1999) |
| 1997 |
|---|
| 7 | EE | Smita Bakshi,
Daniel Gajski:
Hardware/Software Partitioning and Pipelining.
DAC 1997: 713-716 |
| 6 | EE | Smita Bakshi,
Daniel Gajski:
A Scheduling and Pipelining Algorithm for Hardware/Software Systems.
ISSS 1997: 113- |
| 5 | EE | Jie Gong,
Daniel Gajski,
Smita Bakshi:
Model refinement for hardware-software codesign.
ACM Trans. Design Autom. Electr. Syst. 2(1): 22-41 (1997) |
| 1996 |
|---|
| 4 | EE | Smita Bakshi,
Daniel D. Gajski:
Component selection for high-performance pipelines.
IEEE Trans. VLSI Syst. 4(2): 181-194 (1996) |
| 1995 |
|---|
| 3 | EE | Smita Bakshi,
Daniel D. Gajski:
A memory selection algorithm for high-performance pipelines.
EURO-DAC 1995: 124-129 |
| 1994 |
|---|
| 2 | EE | Smita Bakshi,
Daniel D. Gajski:
A component selection algorithm for high-performance pipelines.
EURO-DAC 1994: 400-405 |
| 1 | EE | Smita Bakshi,
Daniel D. Gajski:
Design exploration for high-performance pipelines.
ICCAD 1994: 312-316 |
