| 2003 |
|---|
| 7 | EE | Ramesh Chandra,
Preeti Ranjan Panda,
Jörg Henkel,
Sri Parameswaran,
Loganath Ramachandran:
Specification and Design of Multi-Million Gate SOCs.
VLSI Design 2003: 18-19 |
| 1996 |
|---|
| 6 | EE | Daniel D. Gajski,
Sanjiv Narayan,
Loganath Ramachandran,
Frank Vahid,
Peter Fung:
System design methodologies: aiming at the 100 h design cycle.
IEEE Trans. VLSI Syst. 4(1): 70-82 (1996) |
| 1994 |
|---|
| 5 | | Loganath Ramachandran,
Daniel Gajski,
Viraphol Chaiyakul:
An Algorithm for Array Variable Clustering.
EDAC-ETC-EUROASIC 1994: 262-266 |
| 4 | EE | Loganath Ramachandran,
Daniel D. Gajski,
Sanjiv Narayan,
Frank Vahid,
Peter Fung:
100-hour design cycle: a test case.
EURO-DAC 1994: 144-149 |
| 3 | EE | Daniel D. Gajski,
Loganath Ramachandran:
Introduction to High-Level Synthesis.
IEEE Design & Test of Computers 11(4): 44-54 (1994) |
| 1993 |
|---|
| 2 | EE | Viraphol Chaiyakul,
Daniel Gajski,
Loganath Ramachandran:
High-Level Transformations for Minimizing Syntactic Variances.
DAC 1993: 413-418 |
| 1991 |
|---|
| 1 | | Loganath Ramachandran,
Daniel Gajski:
An Algorithm for Component Selection in Performance Optimized Scheduling.
ICCAD 1991: 92-95 |
