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Matthias Mutz

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1998
6EEMatthias Mutz: Register Transfer Level VHDL Models without Clocks. DATE 1998: 153-158
5EEThomas Lock, Michael Mendler, Matthias Mutz: Combined Formal Post- and Presynthesis Verification in High Level Synthesis. FMCAD 1998: 222-236
1997
4 Matthias Mutz: Automatic post-synthesis verification support for a high level synthesis step by using the HOL theorem proving system. CHARME 1997: 291-308
1994
3EEMatthias Mutz: An automatically verified generalized multifunction arithmetic pipeline. EURO-DAC 1994: 290-295
1991
2 Matthias Mutz: Using the HOL Prove Assistant for proving the Correctness of term Rewriting Rules reducing Terms of Sequential Behavior. CAV 1991: 277-287
1988
1 Werner Grass, Matthias Mutz: Modulare Implementierung von Schaltwerken unter Berücksichtigung topologischer Randbedingungen. GI Jahrestagung (2) 1988: 160-173

Coauthor Index

1Werner Grass [1]
2Thomas Lock [5]
3Michael Mendler [5]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)