| |
| 1997 | ||
|---|---|---|
| 5 | EE | Michael J. Alexander: Power optimization for FPGA look-up tables. ISPD 1997: 156-162 |
| 1996 | ||
| 4 | EE | Michael J. Alexander, Gabriel Robins: New performance-driven FPGA routing algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1505-1517 (1996) |
| 1995 | ||
| 3 | EE | Michael J. Alexander, Gabriel Robins: New Performance-Driven FPGA Routing Algorithms. DAC 1995: 562-567 |
| 2 | EE | Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins: Performance-oriented placement and routing for field-programmable gate arrays. EURO-DAC 1995: 80-85 |
| 1994 | ||
| 1 | EE | Michael J. Alexander, James P. Cohoon, Joseph L. Ganley, Gabriel Robins: An architecture-independent approach to FPGA routing based on multi-weighted graphs. EURO-DAC 1994: 259-264 |
| 1 | James P. Cohoon | [1] [2] |
| 2 | Joseph L. Ganley | [1] [2] |
| 3 | Gabriel Robins | [1] [2] [3] [4] |