Dominique Borrione

2009
48	EE	Yann Oddos, Katell Morin-Allory, Dominique Borrione, Marc Boule, Zeljko Zilic: MYGEN: automata-based on-line test generator for assertion-based verification. ACM Great Lakes Symposium on VLSI 2009: 75-80
2008
47	EE	Yann Oddos, Katell Morin-Allory, Dominique Borrione: Assertion-Based Design with Horus. MEMOCODE 2008: 75-76
46	EE	Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz: Executable formal specification and validation of NoC communication infrastructures. SBCCI 2008: 176-181
45	EE	Julien Schmaltz, Dominique Borrione: A functional formalization of on chip communications. Formal Asp. Comput. 20(3): 241-258 (2008)
2007
44		Yann Oddos, Katell Morin-Allory, Dominique Borrione: Prototyping Generators for On-line Test Vector Generation Based on PSL Properties. DDECS 2007: 383-388
43	EE	Katell Morin-Allory, Laurent Fesquet, Benjamin Roustan, Dominique Borrione: Asynchronous online-monitoring of logical and temporal assertions. FDL 2007: 286-290
42	EE	Dominique Borrione, Amr Helmy, Laurence V. Pierre, Julien Schmaltz: A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study. NOCS 2007: 127-136
41	EE	Katell Morin-Allory, Eric Gascard, Dominique Borrione: Synthesis of Property Monitors for Online Fault Detection. Journal of Circuits, Systems, and Computers 16(6): 943-960 (2007)
2006
40	EE	Julien Schmaltz, Dominique Borrione: Towards a formal theory of on chip communications in the ACL2 logic. ACL2 2006: 47-56
39	EE	Katell Morin-Allory, Dominique Borrione: Proven correct monitors from PSL specifications. DATE 2006: 1246-1251
38	EE	Katell Morin-Allory, Dominique Borrione: On-line Monitoring of Properties Built on Regular Expressions. FDL 2006: 249-255
37	EE	Katell Morin-Allory, Laurent Fesquet, Dominique Borrione: Asynchronous Assertion Monitors for multi-Clock Domain System Verification. IEEE International Workshop on Rapid System Prototyping 2006: 98-102
36	EE	Julien Schmaltz, Dominique Borrione: Formalizing On Chip Communications in a Functional Style. Trustworthy Software 2006
35	EE	Yann Oddos, Katell Morin-Allory, Dominique Borrione: On-Line Test Vector Generation from Temporal Constraints Written in PSL. VLSI-SoC 2006: 397-402
2005
34		Dominique Borrione, Wolfgang J. Paul: Correct Hardware Design and Verification Methods, 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings Springer 2005
33	EE	Ghiath Al Sammane, Dominique Borrione, Remy Chevallier: Verification of behavioral descriptions by combining symbolic simulation and automatic reasoning. ACM Great Lakes Symposium on VLSI 2005: 260-263
32	EE	Julien Schmaltz, Dominique Borrione: A Generic Network on Chip Model. TPHOLs 2005: 310-325
31	EE	Diana Toma, Dominique Borrione: Formal Verification of a SHA-1 Circuit Core Using ACL2. TPHOLs 2005: 326-341
2004
30	EE	Diana Toma, Dominique Borrione, Ghiath Al Sammane: Combining Several Paradigms for Circuit Validation and Verification. CASSIS 2004: 229-249
29	EE	Julien Schmaltz, Dominique Borrione: A Functional Approach to the Formal Specification of Networks on Chip. FMCAD 2004: 52-66
28	EE	Ghiath Al Sammane, Julien Schmaltz, Diana Toma, Pierre Ostier, Dominique Borrione: TheoSim: combining symbolic simulation and theorem proving for hardware verification. SBCCI 2004: 60-65
2003
27	EE	Ghiath Al Sammane, Diana Toma, Julien Schmaltz, Pierre Ostier, Dominique Borrione: Constrained Symbolic Simulation with Mathematica and ACL2. CHARME 2003: 150-157
26	EE	Dominique Borrione, Menouer Boubekeur: Modeling CHP descriptions in Labeled Transitions Systems for an efficient formal validation of asynchronous circuit specifications. FDL 2003: 481-492
25	EE	Dominique Borrione, Menouer Boubekeur, Emil Dumitrescu, Marc Renaudin, Jean-Baptiste Rigaud, Antoine Sirianni: An Approach to the Introduction of Formal Validation in an Asynchronous Circuit Design Flow. HICSS 2003: 279
24	EE	Emil Dumitrescu, Dominique Borrione: Symbolic Simulation as a Simplifying Strategy for SoC Verification. IWSOC 2003: 378-383
23		Dominique Borrione, Menouer Boubekeur, Laurent Mounier, Marc Renaudin, Antoine Sirianni: Validation of asynchronous circuit specifications using IF/CADP. VLSI-SOC 2003: 86-91
2002
22	EE	Joel Blasquez, Marten van Hulst, Andrea Fedeli, Jean-Luc Lambert, Dominique Borrione, Coby Hanoch, Pierre Bricaud: Formal Verification Techniques: Industrial Status and Perspectives. DATE 2002: 1050-1051
21		Jorgiano Vidal, David Déharbe, Dominique Borrione: Improving Static Ordering of BDDs for Reachability Analysis. IWLS 2002: 73-77
2001
20	EE	S. Reda, Ayman M. Wahba, Ashraf M. Salem, Dominique Borrione, M. Ghonaimy: On the use of don't cares during symbolic reachability analysis. ISCAS (5) 2001: 121-124
2000
19	EE	Dominique Borrione, Julia Dushina, Laurence V. Pierre: A compositional model for the functional verification of high-level synthesis results. IEEE Trans. VLSI Syst. 8(5): 526-530 (2000)
18		Vanderlei Moraes Rodrigues, Dominique Borrione, Philippe Georgelin: Using the ACL2 Theorem Prover to Reason about VHDL Components. RITA 7(1): 129-148 (2000)
1999
17		Raimund Ubar, Dominique Borrione: Design Error Diagnosis in Digital Circuits without Error Model. VLSI 1999: 281-292
1997
16		Dominique Borrione, F. Vestman, H. Bouamama: An approach to Verilog-VHDL interoperability for synchronous designs. CHARME 1997: 65-87
15	EE	Ayman M. Wahba, Dominique Borrione: Connection error location and correction in combinational circuits. ED&TC 1997: 235-241
1996
14		Dominique Borrione, H. Bouamama, David Déharbe, C. Le Faou, Ayman M. Wahba: HDL-Based Integration of Formal Methods and CAD Tools in the PREVAIL Environment. FMCAD 1996: 450-467
13	EE	Ayman M. Wahba, Dominique Borrione: A method for automatic design error location and correction in combinational logic circuits. J. Electronic Testing 8(2): 113-127 (1996)
1995
12		Ayman M. Wahba, Dominique Borrione: Design error diagnosis in sequential circuits. CHARME 1995: 171-188
11		David Déharbe, Dominique Borrione: Semantics of a verification-oriented subset of VHDL. CHARME 1995: 293-310
10		Dominique Borrione, Ashraf M. Salem: Denotational Semantics of a Synchronous VHDL Subset. Formal Methods in System Design 7(1/2): 53-71 (1995)
1994
9	EE	Catherine Bayol, Bernard Soulas, Dominique Borrione, Fulvio Corno, Paolo Prinetto: A process algebra interpretation of a verification oriented overlanguage of VHDL. EURO-DAC 1994: 506-511
1992
8	EE	Dominique Borrione, Laurence V. Pierre, Ashraf M. Salem: Formal Verification of VHDL Descriptions in the Prevail Environment. IEEE Design & Test of Computers 9(2): 42-56 (1992)
7	EE	Dominique Borrione, Robert Piloty, Dwight D. Hill, Karl J. Lieberherr, Philip Moorby: Three Decades of HDLs: Part II, Conlan Through Verilog. IEEE Design & Test of Computers 9(3): 54-63 (1992)
1989
6		Dominique Borrione, Paolo Prinetto: Zero-Defect Designs, Why and How: Formal Verification vs. Automated Synthesis. IFIP Congress 1989: 233-240
1983
5		Robert Piloty, Dominique Borrione, Mario Barbacci, Donald L. Dietmeyer, Fredrick J. Hill, Patrick Skelly: CONLAN Report Springer 1983
1980
4	EE	Robert Piloty, Mario Barbacci, Dominique Borrione, Donald L. Dietmeyer, Fredrick J. Hill, Patrick Skelly: CONLAN: a formal construction method for hardware description languages: basic principles. AFIPS National Computer Conference 1980: 209-217
3	EE	Robert Piloty, Mario Barbacci, Dominique Borrione, Donald L. Dietmeyer, Fredrick J. Hill, Patrick Skelly: CONLAN: a formal construction method for hardware description languages: language derivation. AFIPS National Computer Conference 1980: 219-227
2	EE	Robert Piloty, Mario Barbacci, Dominique Borrione, Donald L. Dietmeyer, Fredrick J. Hill, Patrick Skelly: CONLAN: a formal construction method for hardware description languages: language application. AFIPS National Computer Conference 1980: 229-236
1		Robert Piloty, Mario Barbacci, Dominique Borrione, Donald L. Dietmeyer, Fredrick J. Hill, Patrick Skelly: An Overview of CONLAN: A Formal Construction Method for Hardware Description Language. IFIP Congress 1980: 199-204

Coauthor Index

1	Mario Barbacci	[1] [2] [3] [4] [5]
2	Catherine Bayol	[9]
3	Joel Blasquez	[22]
4	H. Bouamama	[14] [16]
5	Menouer Boubekeur	[23] [25] [26]
6	Marc Boule	[48]
7	Pierre Bricaud	[22]
8	Remy Chevallier	[33]
9	Fulvio Corno	[9]
10	David Déharbe	[11] [14] [21]
11	Donald L. Dietmeyer	[1] [2] [3] [4] [5]
12	Emil Dumitrescu	[24] [25]
13	Julia Dushina	[19]
14	C. Le Faou	[14]
15	Andrea Fedeli	[22]
16	Laurent Fesquet	[37] [43]
17	Eric Gascard	[41]
18	Philippe Georgelin	[18]
19	M. Ghonaimy	[20]
20	Coby Hanoch	[22]
21	Amr Helmy	[42] [46]
22	Dwight D. Hill	[7]
23	Fredrick J. Hill	[1] [2] [3] [4] [5]
24	Marten van Hulst	[22]
25	Jean-Luc Lambert	[22]
26	Karl J. Lieberherr	[7]
27	Philip Moorby	[7]
28	Katell Morin-Allory	[35] [37] [38] [39] [41] [43] [44] [47] [48]
29	Laurent Mounier	[23]
30	Yann Oddos	[35] [44] [47] [48]
31	Pierre Ostier	[27] [28]
32	Wolfgang J. Paul	[34]
33	Laurence Pierre	[46]
34	Laurence V. Pierre	[8] [19] [42]
35	Robert Piloty	[1] [2] [3] [4] [5] [7]
36	Paolo Prinetto	[6] [9]
37	S. Reda	[20]
38	Marc Renaudin	[23] [25]
39	Jean-Baptiste Rigaud	[25]
40	Vanderlei Moraes Rodrigues	[18]
41	Benjamin Roustan	[43]
42	Ashraf M. Salem	[8] [10] [20]
43	Ghiath Al Sammane	[27] [28] [30] [33]
44	Julien Schmaltz	[27] [28] [29] [32] [36] [40] [42] [45] [46]
45	Antoine Sirianni	[23] [25]
46	Patrick Skelly	[1] [2] [3] [4] [5]
47	Bernard Soulas	[9]
48	Diana Toma	[27] [28] [30] [31]
49	Raimund Ubar	[17]
50	F. Vestman	[16]
51	Jorgiano Vidal	[21]
52	Ayman M. Wahba	[12] [13] [14] [15] [20]
53	Zeljko Zilic	[48]

Colors in the list of coauthors