| 1996 |
|---|
| 5 | | Andrej Trost,
Roman Kuznar,
Andrej Zemva,
Baldomir Zajc:
An Experimental Programmable Environment for Prototyping Digital Circuits.
FPL 1996: 337-345 |
| 1995 |
|---|
| 4 | EE | Roman Kuznar,
Franc Brglez:
PROP: a recursive paradigm for area-efficient and performance oriented partitioning of large FPGA netlists.
ICCAD 1995: 644-649 |
| 1994 |
|---|
| 3 | EE | Roman Kuznar,
Franc Brglez,
Baldomir Zajc:
Multi-way Netlist Partitioning into Heterogeneous FPGAs and Minimization of Total Device Cost and Interconnect.
DAC 1994: 238-243 |
| 2 | EE | Roman Kuznar,
Baldomir Zajc,
Franc Brglez:
A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions.
EURO-DAC 1994: 271-276 |
| 1993 |
|---|
| 1 | EE | Roman Kuznar,
Franc Brglez,
Krzysztof Kozminski:
Cost Minimization of Partitions into Multiple Devices.
DAC 1993: 315-320 |
