DFT 2008:
Boston,
MA,
USA
Cristiana Bolchini, Yong-Bin Kim, Dimitris Gizopoulos, Mohammad Tehranipoor (Eds.):
23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA.
IEEE Computer Society 2008 BibTeX
Keynote Talk
Session 1 - Defect and Fault Tolerance
Session 2 - Dependability Analysis and Evaluation
Invited Talk
Session 3 - Hot Topics
Session 4 - Design for Testability
- Joon-Sung Yang, Nur A. Touba:
Enhancing Silicon Debug via Periodic Monitoring.
125-133
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- Kevin Sliech, Martin Margala:
A Digital BIST for Phase-Locked Loops.
134-142
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- Shianling Wu, Laung-Terng Wang, Zhigang Jiang, Jiayong Song, Boryau Sheu, Xiaoqing Wen, Michael Hsiao, James Chien-Mo Li, Jiun Lang Huang, Ravi Apte:
On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs.
143-151
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- Saurabh Jain, W. Robert Daasch, David Armbrust:
Analyzing the Impact of Fault Tolerant BIST for VLSI Design.
152-160
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Invited Talk
Session 5 - Poster Session
- Waleed K. Al-Assadi, Sindhu Kakarla:
A BIST Technique for Crosstalk Noise Detection in FPGAs.
167-175
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- Manoj Kumar Goparaju, Ashok Kumar Palaniswany, Spyros Tragoudas:
A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks.
176-183
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- Gong Rui, Dai Kui, Wang Zhiying:
A Framework to Evaluate the Trade-off among AVF Performance and Area of Soft Error Tolerant Microprocessors.
184-192
Electronic Edition (link) BibTeX
- Mahdi Fazeli, Seyed Ghassem Miremadi:
A Power Efficient Masking Technique for Design of Robust Embedded Systems against SEUs and SET.
193-201
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- Francesco Regazzoni, Thomas Eisenbarth, Luca Breveglieri, Paolo Ienne, Israel Koren:
Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?.
202-210
Electronic Edition (link) BibTeX
- Zachary D. Patitz, Nohpill Park:
Modeling and Evaluation of Threshold Defect Tolerance.
211-219
Electronic Edition (link) BibTeX
- Glenn H. Chapman, Vijay K. Jain:
Defect Tolerance for a Capacitance Based Nanoscale Biosensor.
220-228
Electronic Edition (link) BibTeX
- Jae-Young Choi, Yoon-Hwa Choi:
Fault Detection of Bloom Filters for Defect Maps.
229-235
Electronic Edition (link) BibTeX
- Xiaojun Ma, Fabrizio Lombardi:
Fault Tolerant Schemes for QCA Systems.
236-244
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- Ilia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker:
On Reducing Circuit Malfunctions Caused by Soft Errors.
245-253
Electronic Edition (link) BibTeX
- Hongbin Sun, Nanning Zheng, Tong Zhang:
Realization of L2 Cache Defect Tolerance Using Multi-bit ECC.
254-262
Electronic Edition (link) BibTeX
- Ilia Polian, Wenjing Rao:
Selective Hardening of NanoPLA Circuits.
263-271
Electronic Edition (link) BibTeX
- Shuangyu Ruan, Kazuteru Namba, Hideo Ito:
Soft Error Hardened FF Capable of Detecting Wide Error Pulse.
272-280
Electronic Edition (link) BibTeX
- Carlos Arthur Lang Lisbôa, Luigi Carro:
XOR-based Low Cost Checkers for Combinational Logic.
281-289
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- Muhammad Ibrahim, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu:
Minimization of CTS of k-CNOT Circuits for SSF and MSF Model.
290-298
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Invited Talk
Session 6 - Reliability and Fault Tolerance
Session 7 - Error Detection and Correction (I)
Invited Talk
Session 8 - Testing Techniques
- Santiago Remersaro, Janusz Rajski, Thomas Rinderknecht, Sudhakar M. Reddy, Irith Pomeranz:
ATPG Heuristics Dependant Observation Point Insertion for Enhanced Compaction and Data Volume Reduction.
385-393
Electronic Edition (link) BibTeX
- Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
Detection of Transistor Stuck-Open Faults in Asynchronous Inputs of Scan Cells.
394-402
Electronic Edition (link) BibTeX
- Yiwen Shi, Kellie DiPalma, Jennifer Dworak:
Efficient Determination of Fault Criticality for Manufacturing Test Set Optimization.
403-411
Electronic Edition (link) BibTeX
- Hyunbean Yi, Sandip Kundu:
Core Test Wrapper Design to Reduce Test Application Time for Modular SoC Testing.
412-420
Electronic Edition (link) BibTeX
Invited Talk
Session 10 - Error Detection and Correction (2)
- Laura Frigerio, Matteo A. Radaelli, Fabio Salice:
A Generalized Approach for the Use of Convolutional Coding in SEU Mitigation.
427-435
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- Salvatore Pontarelli, Gian-Carlo Cardarilli, Marco Re, Adelio Salsano:
A Novel Error Detection and Correction Technique for RNS Based FIR Filters.
436-444
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- Hamed Tabkhi, Seyed Ghassem Miremadi, Alireza Ejlali:
An Asymmetric Checkpointing and Rollback Error Recovery Scheme for Embedded Processors.
445-453
Electronic Edition (link) BibTeX
- Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti:
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller.
454-462
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Session 11 - Testing for Timing and Parametric Failures
Invited Talks
Session 12 - Emerging Technologies
- Yoshiaki Asao, Masayoshi Iwayama, Kenji Tsuchida, Akihiro Nitayama, Hiroaki Yoda, Hisanori Aikawa, Sumio Ikegawa, Tatsuya Kishi:
A Statistical Model for Assessing the Fault Tolerance of Variable Switching Currents for a 1Gb Spin Transfer Torque Magnetoresistive Random Access Memory.
507-515
Electronic Edition (link) BibTeX
- Masoud Hashempour, Zahra Mashreghian Arani, Fabrizio Lombardi:
A Tile-Based Error Model for Forward Growth of DNA Self-Assembly.
516-524
Electronic Edition (link) BibTeX
- Stephen Frechette, Yong-Bin Kim, Fabrizio Lombardi:
Checkpointing of Rectilinear Growth in DNA Self-Assembly.
525-533
Electronic Edition (link) BibTeX
- Michael Nemier, Michael Crocker, Xiaobo Sharon Hu:
Fabrication Variations and Defect Tolerance for Nanomagnet-Based QCA.
534-542
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:06:37 2009
by Michael Ley (ley@uni-trier.de)
