Volume 26,
Number 1,
January-February 2006
Editor-in-Chief's Message
Micro Economics
Features
- Josep Torrellas:
Guest Editor's Introduction: Micro's Top Picks from Microarchitecture Conferences.
8-9
Electronic Edition (link) BibTeX
- Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance.
10-20
Electronic Edition (link) BibTeX
- Ibrahim Hur, Calvin Lin:
Adaptive History-Based Memory Schedulers for Modern Processors.
22-29
Electronic Edition (link) BibTeX
- Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan, Konrad Lai:
Scalable Load and Store Processing in Latency-Tolerant Processors.
30-39
Electronic Edition (link) BibTeX
- Ronald D. Barnes, Shane Ryoo, Wen-mei W. Hwu:
Tolerating Cache-Miss Latency with Multipass Pipelines.
40-47
Electronic Edition (link) BibTeX
- Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark:
Wish Branches: Enabling Adaptive and Aggressive Predicated Execution.
48-58
Electronic Edition (link) BibTeX
- C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie:
Unbounded Transactional Memory.
59-69
Electronic Edition (link) BibTeX
- Jason F. Cantin, James E. Smith, Mikko H. Lipasti, Andreas Moshovos, Babak Falsafi:
Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays.
70-79
Electronic Edition (link) BibTeX
- Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti R. Sarangi, James Tuck, Josep Torrellas:
Energy-Efficient Thread-Level Speculation.
80-91
Electronic Edition (link) BibTeX
- Mohamed A. Gomaa, T. N. Vijaykumar:
Opportunistic Transient-Fault Detection.
92-99
Electronic Edition (link) BibTeX
- Satish Narayanasamy, Gilles Pokam, Brad Calder:
BugNet: Recording Application-Level Execution for Deterministic Replay Debugging.
100-109
Electronic Edition (link) BibTeX
- Lin Tan, Timothy Sherwood:
Architectures for Bit-Split String Scanning in Intrusion Detection.
110-117
Electronic Edition (link) BibTeX
- Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks:
Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance.
119-129
Electronic Edition (link) BibTeX
- Li Shang, Li-Shiuan Peh, Amit Kumar, Niraj K. Jha:
Temperature-Aware On-Chip Networks.
130-139
Electronic Edition (link) BibTeX
Micro Review
Micro Innovations
Volume 26,
Number 2,
March-April 2006
Editor-in-Chief's Message
Micro Economics
Features
- John Sell, Alan Jay Smith:
Guest Editors' Introduction: Hot Chips 17.
8-9
Electronic Edition (link) BibTeX
- Michael Gschwind, H. Peter Hofstee, Brian K. Flachs, Martin Hopkins, Yukio Watanabe, Takeshi Yamazaki:
Synergistic Processing in Cell's Multicore Architecture.
10-24
Electronic Edition (link) BibTeX
- Jeff Andrews, Nick Baker:
Xbox 360 System Architecture.
25-37
Electronic Edition (link) BibTeX
- Boris Murmann:
Digitally Assisted Analog Circuits.
38-47
Electronic Edition (link) BibTeX
- Volker Lindenstruth:
An Extreme Processor for an Extreme Experiment.
48-57
Electronic Edition (link) BibTeX
- Cary Gunn:
CMOS Photonics for High-Speed Interconnects.
58-66
Electronic Edition (link) BibTeX
- Amit Agarwal, Saibal Mukhopadhyay, Arijit Raychowdhury, Kaushik Roy, Chris H. Kim:
Leakage Power Analysis and Reduction for Nanoscale Circuits.
68-80
Electronic Edition (link) BibTeX
Micro Innovations
Volume 26,
Number 3,
May-June 2006
Editor-in-Chief's Message
Micro Economics
Features
- Fabrizio Petrini, Olav Lysne, Ron Brightwell:
Guest Editors' Introduction: High-Performance Interconnects.
7-9
Electronic Edition (link) BibTeX
- Michael Kistler, Michael Perrone, Fabrizio Petrini:
Cell Multiprocessor Communication Network: Built for Speed.
10-23
Electronic Edition (link) BibTeX
- Pavan Balaji, Wu-chun Feng, Dhabaleswar K. Panda:
Bridging the Ethernet-Ethernot Performance Gap.
24-40
Electronic Edition (link) BibTeX
- Ron Brightwell, Kevin T. Pedretti, Keith D. Underwood, Trammell Hudson:
SeaStar Interconnect: Balanced Bandwidth for Scalable Performance.
41-57
Electronic Edition (link) BibTeX
- Cyriel Minkenberg, François Abel, Peter Müller, Raj Krishnamurthy, Mitchell Gusat, Peter Dill, Ilias Iliadis, Ronald P. Luijten, B. Roe Hemenway, Richard Grzybowski, Enrico Schiattarella:
Designing a Crossbar Scheduler for HPC Applications.
58-71
Electronic Edition (link) BibTeX
- Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravi R. Iyer:
A Network Processor-Based, Content-Aware Switch.
72-84
Electronic Edition (link) BibTeX
Micro Review
Micro Law
Micro Innovations
Volume 26,
Number 4,
July-August 2006
Editor-in-Chief's Message
Micro Economics
Features
- Timothy Sherwood, Joshua J. Yi:
Guest Editors' Introduction: Computer Architecture Simulation and Modeling.
5-7
Electronic Edition (link) BibTeX
- Alaa R. Alameldeen, David A. Wood:
IPC Considered Harmful for Multiprocessor Workloads.
8-17
Electronic Edition (link) BibTeX
- Thomas F. Wenisch, Roland E. Wunderlich, Michael Ferdman, Anastassia Ailamaki, Babak Falsafi, James C. Hoe:
SimFlex: Statistical Sampling of Computer System Simulation.
18-31
Electronic Edition (link) BibTeX
- Michael Van Biesbrouck, Brad Calder, Lieven Eeckhout:
Efficient Sampling Startup for SimPoint.
32-42
Electronic Edition (link) BibTeX
- Sudhanva Gurumurthi, Youngjae Kim, Anand Sivasubramaniam:
Using STEAM for Thermal Simulation of Storage Systems.
43-51
Electronic Edition (link) BibTeX
- Nathan L. Binkert, Ronald G. Dreslinski, Lisa R. Hsu, Kevin T. Lim, Ali G. Saidi, Steven K. Reinhardt:
The M5 Simulator: Modeling Networked Systems.
52-60
Electronic Edition (link) BibTeX
- Yong-Joon Park, Zhao Zhang, Gyungho Lee:
Microarchitectural Protection Against Stack-Based Buffer Overflow Attacks.
62-71
Electronic Edition (link) BibTeX
- Jesús Alastruey, José Luis Briz, Pablo Ibáñez, Víctor Viñals:
Software Demand, Hardware Supply.
72-82
Electronic Edition (link) BibTeX
Micro Review
Micro Innovations
Volume 26,
Number 5,
September-October 2006
Editor-in-Chief's Message
Micro Economics
Micro Law
Features
- Egas Henes Neto, Ivandro Ribeiro, Michele G. Vieira, Gilson I. Wirth, Fernanda Lima Kastensmidt:
Using Bulk Built-in Current Sensors to Detect Soft Errors.
10-18
Electronic Edition (link) BibTeX
- Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits.
19-27
Electronic Edition (link) BibTeX
- Radu Teodorescu, Jun Nakano, Josep Torrellas:
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback.
28-40
Electronic Edition (link) BibTeX
- Ricardo E. Gonzalez:
A Software-Configurable Processor Architecture.
42-51
Electronic Edition (link) BibTeX
- Pedro Javier García, Francisco J. Quiles, Jose Flich, José Duato, Ian Johnson, Finbar Naven:
Efficient, Scalable Congestion Management for Interconnection Networks.
52-66
Electronic Edition (link) BibTeX
- Valentina Salapura, Robert Walkup, Alan Gara:
Exploiting Workload Parallelism for Performance and Power Optimization in Blue Gene.
67-81
Electronic Edition (link) BibTeX
Micro Review
Micro Innovations
Volume 26,
Number 6,
November/December 2006
Editor-in-Chief's Message
Micro Economics
Features
- Daniel Gracia Pérez, Hugues Berry, Olivier Temam:
A Sampling Method Focusing on Practicality.
14-28
Electronic Edition (link) BibTeX
- Osman S. Unsal, James Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin:
Impact of Parameter Variations on Circuits and Microarchitecture.
30-39
Electronic Edition (link) BibTeX
- Rajeev Balasubramonian, Naveen Muralimanohar, Karthik Ramani, Liqun Cheng, John B. Carter:
Leveraging Wire Properties at the Microarchitecture Level.
40-52
Electronic Edition (link) BibTeX
Micro Innovations
Copyright © Sun May 17 00:13:22 2009
by Michael Ley (ley@uni-trier.de)
