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Xavier Vera

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2008
21EEPedro Chaparro, Jaume Abella, Javier Carretero, Xavier Vera: Issue system protection mechanisms. ICCD 2008: 599-604
2007
20EEJaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González: Fuse: A Technique to Anticipate Failures due to Degradation in ALUs. IOLTS 2007: 15-22
19EEXavier Vera, Jaume Abella: Surviving to Errors in Multi-Core Environments. IOLTS 2007: 260
18EEJaume Abella, Xavier Vera, Antonio González: Penelope: The NBTI-Aware Processor. MICRO 2007: 85-96
17EEXavier Vera, Björn Lisper, Jingling Xue: Data cache locking for tight timing calculations. ACM Trans. Embedded Comput. Syst. 7(1): (2007)
2006
16EEOsman S. Unsal, Oguz Ergin, Xavier Vera, Antonio González: Empowering a helper cluster through data-width aware instruction selection policies. IPDPS 2006
15EEOguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González: Exploiting Narrow Values for Soft Error Tolerance. Computer Architecture Letters 5(2): (2006)
14EEOsman S. Unsal, James Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin: Impact of Parameter Variations on Circuits and Microarchitecture. IEEE Micro 26(6): 30-39 (2006)
2005
13EEEnric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González: Variable-Based Multi-module Data Caches for Clustered VLIW Processors. IEEE PACT 2005: 207-217
12EEXavier Vera, Jaume Abella, Josep Llosa, Antonio González: An accurate cost model for guiding data locality transformations. ACM Trans. Program. Lang. Syst. 27(5): 946-987 (2005)
11EEJaume Abella, Antonio González, Xavier Vera, Michael F. P. O'Boyle: IATAC: a smart predictor to turn-off L2 cache lines. TACO 2(1): 55-77 (2005)
2004
10EEXavier Vera, Nerina Bermudo, Josep Llosa, Antonio González: A fast and accurate framework to analyze and optimize cache memory behavior. ACM Trans. Program. Lang. Syst. 26(2): 263-300 (2004)
9EEJingling Xue, Xavier Vera: Efficient and Accurate Analytical Modeling of Whole-Program Data Cache Behavior. IEEE Trans. Computers 53(5): 547-566 (2004)
2003
8EEQingguang Huang, Jingling Xue, Xavier Vera: Code Tiling for Improving the Cache Performance of PDE Solvers. ICPP 2003: 615-
7EEXavier Vera, Jaume Abella, Antonio González, Josep Llosa: Optimizing Program Locality Through CMEs and GAs. IEEE PACT 2003: 68-78
6EEXavier Vera, Björn Lisper, Jingling Xue: Data Caches in Multitasking Hard Real-Time Systems. RTSS 2003: 154-165
5EEXavier Vera, Björn Lisper, Jingling Xue: Data cache locking for higher program predictability. SIGMETRICS 2003: 272-282
2002
4EEXavier Vera, Jingling Xue: Let's Study Whole-Program Cache Behaviour Analytically. HPCA 2002: 175-186
3EEJaume Abella, Antonio González, Josep Llosa, Xavier Vera: Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms. ICPP Workshops 2002: 568-580
2EEXavier Vera, Josep Llosa, Antonio González: Near-Optimal Padding for Removing Conflict Misses. LCPC 2002: 329-343
2000
1EEXavier Vera, Josep Llosa, Antonio González, Nerina Bermudo: A Fast and Accurate Approach to Analyze Cache Memory Behavior (Research Note). Euro-Par 2000: 194-198

Coauthor Index

1Jaume Abella [3] [7] [11] [12] [13] [18] [19] [20] [21]
2Nerina Bermudo [1] [10]
3Keith A. Bowman [14]
4Javier Carretero [21]
5Pedro Chaparro [21]
6Vivek De [14]
7Oguz Ergin [14] [15] [16] [20]
8Enric Gibert [13]
9Antonio González [1] [2] [3] [7] [10] [11] [12] [13] [14] [15] [16] [18] [20]
10Qingguang Huang [8]
11Björn Lisper [5] [6] [17]
12Josep Llosa [1] [2] [3] [7] [10] [12]
13Michael F. P. O'Boyle [11]
14F. Jesús Sánchez [13]
15James Tschanz [14]
16Osman S. Unsal [14] [15] [16] [20]
17Jingling Xue [4] [5] [6] [8] [9] [17]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)