Muhammad M. Khellah

2008
16	EE	DiaaEldin Khalil, Yehea I. Ismail, Muhammad M. Khellah, Tanay Karnik, Vivek De: Analytical Model for the Propagation Delay of Through Silicon Vias. ISQED 2008: 553-556
15	EE	D. E. Khalil, Muhammad M. Khellah, Nam-Sung Kim, Yehea I. Ismail, Tanay Karnik, V. K. De: Accurate Estimation of SRAM Dynamic Stability. IEEE Trans. VLSI Syst. 16(12): 1639-1647 (2008)
2007
14	EE	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm: Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling. IEEE Trans. VLSI Syst. 15(7): 746-757 (2007)
2006
13	EE	Yibin Ye, Muhammad M. Khellah, Dinesh Somasekhar, Vivek De: Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches. ISCAS 2006
12	EE	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De: Reducing the data switching activity of serialized datastreams. ISCAS 2006
11	EE	Keith A. Bowman, James Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De: Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. ISLPED 2006: 79-84
10	EE	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De: Reducing the Data Switching Activity on Serial Link Buses. ISQED 2006: 425-432
9	EE	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De: Formal derivation of optimal active shielding for low-power on-chip buses. IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 821-836 (2006)
2005
8	EE	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm: Variations-aware low-power design with voltage scaling. DAC 2005: 529-534
7		Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De: Serial-link bus: a low-power on-chip bus architecture. ICCAD 2005: 541-546
6	EE	Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Nasser Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail: A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors. ICCD 2005: 253-257
5	EE	Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Vivek De: Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses. ISCAS (1) 2005: 592-595
2001
4	EE	Muhammad M. Khellah, Mohamed I. Elmasry: A low-power high-performance current-mode multiport SRAM. IEEE Trans. VLSI Syst. 9(5): 590-598 (2001)
1998
3	EE	A. M. Fahim, Muhammad M. Khellah, Mohamed I. Elmasry: A Low-Power High-Performance Embedded SRAM Macrocell. Great Lakes Symposium on VLSI 1998: 13-17
2	EE	Muhammad M. Khellah, Mohamed I. Elmasry: Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation. Great Lakes Symposium on VLSI 1998: 414-419
1996
1	EE	Stephen Dean Brown, Muhammad M. Khellah, Zvonko G. Vranesic: Minimizing FPGA Interconnect Delays. IEEE Design & Test of Computers 13(4): 16-23 (1996)

Coauthor Index

1	Navid Azizi	[8] [14]
2	Javed Barkatullah	[6]
3	Keith A. Bowman	[11]
4	Stephen Dean Brown	[1]
5	V. K. De	[15]
6	Vivek De	[5] [7] [8] [9] [10] [11] [12] [13] [14] [16]
7	Mohamed I. Elmasry	[2] [3] [4]
8	A. M. Fahim	[3]
9	Maged Ghoneima	[5] [6] [7] [9] [10] [11] [12]
10	Yehea I. Ismail	[5] [6] [7] [9] [10] [11] [12] [15] [16]
11	Tanay Karnik	[15] [16]
12	D. E. Khalil	[15]
13	DiaaEldin Khalil	[16]
14	Nam-Sung Kim	[15]
15	Nasser Kurd	[6]
16	Farid N. Najm	[8] [14]
17	Srikanth Nimmagadda	[6]
18	Dinesh Somasekhar	[13]
19	James Tschanz	[5] [6] [7] [9] [11]
20	Zvonko G. Vranesic	[1]
21	Yibin Ye	[5] [6] [13]

Colors in the list of coauthors