| |
| 2004 | ||
|---|---|---|
| 2 | Bassam Shaer, Kailash Aurangabadkar: An Automated Algorithm for Partitioning Sequential VLSI Circuits. ESA/VLSI 2004: 367-373 | |
| 2003 | ||
| 1 | EE | Bassam Shaer, Kailash Aurangabadkar, Nitin Agarwal: Testable Sequential Circuit Design: Partitioning for Pseudoexhaustive Test. ISVLSI 2003: 244-245 |
| 1 | Nitin Agarwal | [1] |
| 2 | Bassam Shaer | [1] [2] |